Xilinx Blocks

∙Polyphase behavior: Decimation, Interpolation, Single rate.

∙Latency: specify input sample period latency.

∙Hardware Over-Sampling Rate: Hardware clocks per sample. This affects hardware implementation only, and has no effect on simulation. In multi-channel mode, this factor will multiply the implicit oversampling factor.

Other parameters used by this block are explained in the Common Parameters section of the previous chapter.

The FIR filter block cannot be placed in an enabled subsystem in System Generator v2.1. See the Enabled Subsystems section (within the MATLAB I/O library documentation) explanation for more details.

Xilinx LogiCORE

The block always uses the Xilinx LogiCORE Distributed Arithmetic FIR Filter V6.0.

The Simulink model operates on a sample in/sample out basis, but the core has the capability of using serial arithmetic by overclocking. Although this adds latency, it has the benefit of reducing the hardware required for the filter. Refer to the core datasheet for more details of the filter modes and parameters.

The core datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\da_fir_v6_0\doc\ da_fir.pdf

Math

The Math section of the Xilinx Blockset contains mathematical functions.

Accumulator

The Xilinx Accumulator block implements an adder or subtractor based scaling accumulator. The block’s current input is accumulated with a scaled current stored value. The scale factor is a block parameter.

Block Interface

The block has an input b, a reset rst, and an output q. The output must have the same width as the input data. The output q is calculated as follows:

The output must have the same arithmetic type as the input. The block has latency of one sample period.

A subtractor based accumulator replaces addition of the current input b(n) with subtraction. The output will have the same arithmetic type and binary point position as the input. The block always has a latency of one sample period.

Math

81

Page 80 Page 82
Page 81
Image 81
Xilinx V2.1 manual Math, Accumulator
Page 80 Page 82

V2.1 specifications

Xilinx V2.1 is a notable iteration in the series of versatile and robust Field-Programmable Gate Arrays (FPGAs) developed to cater to a wide range of applications. Launched to provide enhancements in performance and flexibility, V2.1 embodies sophisticated technologies and features that stand out in the electronics industry.

One of the primary features of Xilinx V2.1 is its improved processing power. The architecture has been optimized to support higher clock speeds and increased logic density, allowing for more complex designs to be implemented effectively. This boost in performance is facilitated by utilizing advanced silicon technologies, which significantly reduce power consumption while maximizing efficiency.

Another significant characteristic of Xilinx V2.1 is its enhanced I/O (Input/Output) capabilities. The device supports a variety of industry-standard interfaces, which include PCI Express, SATA, and various serial communication protocols. Such adaptability ensures seamless integration into existing systems, providing engineers with the flexibility to adapt to various application requirements without the need for substantial redesign efforts.

Xilinx V2.1 also features improved scalability, making it a prime choice for applications that demand diverse performance levels. This device supports an array of configurations and can be used in small-scale projects as well as in larger, more demanding environments requiring extensive resources. This scalability is further aided by support for multiple development platforms, enabling rapid prototyping and simplifying the design process.

Security is increasingly becoming a priority in digital design, and Xilinx V2.1 addresses this concern via hardware security features. It includes enhanced encryption protocols and secure boot functionalities, which help protect intellectual property and sensitive data from unauthorized access.

Additionally, the integration of advanced DSP (Digital Signal Processing) blocks allows Xilinx V2.1 to efficiently handle data-intensive tasks such as video processing and real-time signal analysis. These capabilities make it suitable for applications in telecommunications, automotive systems, and industrial automation.

Xilinx V2.1 also benefits from a rich development environment, including robust software tools that facilitate design entry, simulation, and verification. The support for industry-standard programming languages like VHDL and Verilog simplifies the development process, enabling engineers to design complex systems more efficiently.

In summary, Xilinx V2.1 stands out due to its impressive combination of high performance, flexibility, scalability, security, and comprehensive development support. These features make it a valuable asset for engineers and developers looking to innovate across various sectors, from telecommunications and automotive to industrial applications.
Top Page Image Contents