Xilinx V2.1 manual Xilinx LogiCore, Xilinx System Generator v2.1 Reference Guide

Models: V2.1

1 148
Download 148 pages 48.7 Kb
Page 70
Image 70
Manual background

Xilinx System Generator v2.1 Reference Guide

Traceback Length: Length of the traceback through the Viterbi trellis. Optimal length is considered to be between 5 and 7 times the constraint length.

Convolution Code 1: Used to decode data on input port din1. Length of convolution code must be between 3 and 9 (inclusive).

Convolution Code 2: Used to decode data on input port din2. Length of convolution code must be between 3 and 9 (inclusive).

Convolution Code 3: Used to decode data on input port din3. Length of convolution code must be between 3 and 9 (inclusive). This parameter is only available for encoder output rate of 3.

Coding: Hard or Soft. Hard coding uses the Hamming metric to calculate the difference between the input and the branches in the Viterbi trellis. Hard coding requires the input data to be 1 bit wide. Soft coding uses the Euclidean metric to cost the incoming data against the branches of the Viterbi trellis. When using soft coding, the input port widths must be between 3 and 8 bits.

Data Format: Signed Magnitude and Offset Binary (available for Soft Coding only).

Other parameters used by this block are described in the Common Parameters section of the previous chapter.

The Viterbi Decoder block cannot be placed in an enabled subsystem in System Generator v2.1. See the Enabled Subsystems section (within the MATLAB I/O library documentation) explanation for more details.

Xilinx LogiCore

The Viterbi Decoder block uses Xilinx LogiCORE: Viterbi v1.0.

The Core datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\viterbi_v1_0\doc \viterbi.pdf

This is a licensed core, available for purchase on the Xilinx web site at:

http://www.xilinx.com/ipcenter/viterbi

DSP

This library contains blocks that implement Digital Signal Processing (DSP) specific functions.

CIC

Cascaded integrator-comb (CIC) filters are multirate filters used for realizing large sample rate changes in digital systems. Both decimation and interpolation structures are supported. CIC filters contain no multipliers; they consist only of adders, subtractors and registers. They are typically employed in applications that have a large excess sample rate; that is, the system sample rate is much larger than the bandwidth occupied by the signal. CIC filters are frequently used in digital down- converters and digital up-converters.

70

Xilinx Development System

Page 70
Image 70
Xilinx V2.1 manual Xilinx LogiCore, Xilinx System Generator v2.1 Reference Guide, Xilinx Development System