Xilinx System Generator v2.1 Reference Guide

Traceback Length: Length of the traceback through the Viterbi trellis. Optimal length is considered to be between 5 and 7 times the constraint length.

Convolution Code 1: Used to decode data on input port din1. Length of convolution code must be between 3 and 9 (inclusive).

Convolution Code 2: Used to decode data on input port din2. Length of convolution code must be between 3 and 9 (inclusive).

Convolution Code 3: Used to decode data on input port din3. Length of convolution code must be between 3 and 9 (inclusive). This parameter is only available for encoder output rate of 3.

Coding: Hard or Soft. Hard coding uses the Hamming metric to calculate the difference between the input and the branches in the Viterbi trellis. Hard coding requires the input data to be 1 bit wide. Soft coding uses the Euclidean metric to cost the incoming data against the branches of the Viterbi trellis. When using soft coding, the input port widths must be between 3 and 8 bits.

Data Format: Signed Magnitude and Offset Binary (available for Soft Coding only).

Other parameters used by this block are described in the Common Parameters section of the previous chapter.

The Viterbi Decoder block cannot be placed in an enabled subsystem in System Generator v2.1. See the Enabled Subsystems section (within the MATLAB I/O library documentation) explanation for more details.

Xilinx LogiCore

The Viterbi Decoder block uses Xilinx LogiCORE: Viterbi v1.0.

The Core datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\viterbi_v1_0\doc \viterbi.pdf

This is a licensed core, available for purchase on the Xilinx web site at:

http://www.xilinx.com/ipcenter/viterbi

DSP

This library contains blocks that implement Digital Signal Processing (DSP) specific functions.

CIC

Cascaded integrator-comb (CIC) filters are multirate filters used for realizing large sample rate changes in digital systems. Both decimation and interpolation structures are supported. CIC filters contain no multipliers; they consist only of adders, subtractors and registers. They are typically employed in applications that have a large excess sample rate; that is, the system sample rate is much larger than the bandwidth occupied by the signal. CIC filters are frequently used in digital down- converters and digital up-converters.

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Xilinx V2.1 manual Dsp

V2.1 specifications

Xilinx V2.1 is a notable iteration in the series of versatile and robust Field-Programmable Gate Arrays (FPGAs) developed to cater to a wide range of applications. Launched to provide enhancements in performance and flexibility, V2.1 embodies sophisticated technologies and features that stand out in the electronics industry.

One of the primary features of Xilinx V2.1 is its improved processing power. The architecture has been optimized to support higher clock speeds and increased logic density, allowing for more complex designs to be implemented effectively. This boost in performance is facilitated by utilizing advanced silicon technologies, which significantly reduce power consumption while maximizing efficiency.

Another significant characteristic of Xilinx V2.1 is its enhanced I/O (Input/Output) capabilities. The device supports a variety of industry-standard interfaces, which include PCI Express, SATA, and various serial communication protocols. Such adaptability ensures seamless integration into existing systems, providing engineers with the flexibility to adapt to various application requirements without the need for substantial redesign efforts.

Xilinx V2.1 also features improved scalability, making it a prime choice for applications that demand diverse performance levels. This device supports an array of configurations and can be used in small-scale projects as well as in larger, more demanding environments requiring extensive resources. This scalability is further aided by support for multiple development platforms, enabling rapid prototyping and simplifying the design process.

Security is increasingly becoming a priority in digital design, and Xilinx V2.1 addresses this concern via hardware security features. It includes enhanced encryption protocols and secure boot functionalities, which help protect intellectual property and sensitive data from unauthorized access.

Additionally, the integration of advanced DSP (Digital Signal Processing) blocks allows Xilinx V2.1 to efficiently handle data-intensive tasks such as video processing and real-time signal analysis. These capabilities make it suitable for applications in telecommunications, automotive systems, and industrial automation.

Xilinx V2.1 also benefits from a rich development environment, including robust software tools that facilitate design entry, simulation, and verification. The support for industry-standard programming languages like VHDL and Verilog simplifies the development process, enabling engineers to design complex systems more efficiently.

In summary, Xilinx V2.1 stands out due to its impressive combination of high performance, flexibility, scalability, security, and comprehensive development support. These features make it a valuable asset for engineers and developers looking to innovate across various sectors, from telecommunications and automotive to industrial applications.