Xilinx Blocks

DDS

The Xilinx DDS Block implements a direct digital synthesizer (DDS), also commonly called a numerically controlled oscillator (NCO). The block employs a look-up table scheme to generate real or complex valued sinusoids. An internal look-up table stores samples representing one period of a sinusoid. A digital integrator (accumulator) is then used to generate a suitable phase argument that is mapped by the look-up table into the desired output waveform.

To understand how to use the DDS block, it is necessary to understand how the block is implemented in hardware, as the block parameters are defined in terms of the DDS implementation as a Xilinx LogiCORE. The figure below shows a high-level view of the core. The input phase increment Δθ is registered and integrated in a phase accumulator. A phase offset is added to the high-precision phase angle computed by the accumulator, and the sum is quantized by truncation. The quantized value is then used to index into the Sine/Cosine Lookup Table, mapping phase-space into time. The phase increment Δθ is defined by the following relationship

The phase offset and phase increment can be defined as constants or can be set dynamically through optional input ports (details not shown in the figure). When one or both are set dynamically, the block has a single data port, which is multiplexed between the Phase Increment and Phase Offset inputs, with the selection determined by the value on a select port of the block. If only one of the increment and offset is configurable, there is no select port. The data value is registered in the Phase Increment register or the Phase Offset register when the block’s write enable input is 1.

When phase dithering is used, the dither sequence d(n) linearises the quantizer Q() that is used to produce the sine/cosine LUT address. The additional logic resources required to implement the dither sequence generator are not significant.

Figure 3-48: High-Level View of LogiCORE DDS Implementation

DSP

73

Page 72 Page 74
Page 73
Image 73
Xilinx V2.1 manual Dds
Page 72 Page 74

V2.1 specifications

Xilinx V2.1 is a notable iteration in the series of versatile and robust Field-Programmable Gate Arrays (FPGAs) developed to cater to a wide range of applications. Launched to provide enhancements in performance and flexibility, V2.1 embodies sophisticated technologies and features that stand out in the electronics industry.

One of the primary features of Xilinx V2.1 is its improved processing power. The architecture has been optimized to support higher clock speeds and increased logic density, allowing for more complex designs to be implemented effectively. This boost in performance is facilitated by utilizing advanced silicon technologies, which significantly reduce power consumption while maximizing efficiency.

Another significant characteristic of Xilinx V2.1 is its enhanced I/O (Input/Output) capabilities. The device supports a variety of industry-standard interfaces, which include PCI Express, SATA, and various serial communication protocols. Such adaptability ensures seamless integration into existing systems, providing engineers with the flexibility to adapt to various application requirements without the need for substantial redesign efforts.

Xilinx V2.1 also features improved scalability, making it a prime choice for applications that demand diverse performance levels. This device supports an array of configurations and can be used in small-scale projects as well as in larger, more demanding environments requiring extensive resources. This scalability is further aided by support for multiple development platforms, enabling rapid prototyping and simplifying the design process.

Security is increasingly becoming a priority in digital design, and Xilinx V2.1 addresses this concern via hardware security features. It includes enhanced encryption protocols and secure boot functionalities, which help protect intellectual property and sensitive data from unauthorized access.

Additionally, the integration of advanced DSP (Digital Signal Processing) blocks allows Xilinx V2.1 to efficiently handle data-intensive tasks such as video processing and real-time signal analysis. These capabilities make it suitable for applications in telecommunications, automotive systems, and industrial automation.

Xilinx V2.1 also benefits from a rich development environment, including robust software tools that facilitate design entry, simulation, and verification. The support for industry-standard programming languages like VHDL and Verilog simplifies the development process, enabling engineers to design complex systems more efficiently.

In summary, Xilinx V2.1 stands out due to its impressive combination of high performance, flexibility, scalability, security, and comprehensive development support. These features make it a valuable asset for engineers and developers looking to innovate across various sectors, from telecommunications and automotive to industrial applications.
Top Page Image Contents