Agilent Technologies B2201A Standard Event Status Enable Register, Bit Definition Explanation

			SCPI Command Reference
			Standard Event Status Enable Register
Table 5-2	Standard Event Status Register of B2200
	Bit	Definition	Explanation
	0	Operation Complete	This event bit has meaning only if a request
		(OPC)	to monitor is set by the *OPC command.
			See “*OPC” on page 5-8. This bit is set to 1
			if there are no pending operations.
	1	Not Used	Always 0.
	2	Query Error (QYE)	• An attempt is being made to read data
			from the Output Queue when no data is
			present or pending.
			• Data in the Output Queue has been lost.
	3	Device Dependent	This event bit indicates that an error has
		Error (DDE)	occurred which is not a Command Error, a
			Query Error, or an Execution Error.
	4	Execution Error (EXE)	Syntax of command is correct, but cannot be
			executed due to some condition of the
			B2200.
	5	Command Error	A command syntax error has been detected.
		(CME)
	6	Not Used	Always 0.
	7	Power On (PON)	This event bit indicates that an off-to-on
			transition has occurred in instrument's
			power supply.
	8 to 15	Not used	Always 0.

Standard Event Status Enable Register

The Standard Event Status “Enable” Register is an 8-bit register that can be used by the programmer to select which bits of Standard Event Status Register are enabled. The status of the enabled bits are ORed together, and result of OR will be reported to the ESB bit (Bit5) of the Status Byte Register.

The 8 bits of this register correspond to the 8 bits of the Standard Event Status

Register. See Figure 5-4.

Agilent B2200 User’s Guide, Edition 2 5-59