The Condition Register Calibration, waiting for an arm signal, execution of the INITiate:IMMediate command, and memory partitioning are monitored with the following bits in the Condition register. All other bits are unused.

15

14

13

12

11

10

9

8

7

6

5

4

 

3

 

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

unused

 

 

READY

BUSY

 

ARM

 

 

unused

 

 

CAL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CALibrating: Bit 0 is set (1) during calibration. The bit is cleared (0) otherwise.

Waiting for ARM: Bit 6 is set (1) when the digitizer enters the wait-for-arm state. The bit is cleared (0) when a start arm is received or when the measurements are aborted.

BUSY: Bit 8 is set (1) when the INITiate[:IMMediate] command is executed. The bit is cleared (0) when the measurements are complete or aborted, and the digitizer returns to the idle state.

READY: Bit 9 is set(1) when a digitizer memory segment is ready for data storage. The bit is cleared (0) while the digitizer is partitioning the next memory segment.

Reading the Condition Register

Bit settings in the Condition register can be determined with the command:

STATus:OPERation:CONDition?

Bits 0, 6, 8, and 9 have corresponding decimal values of 1, 64, 256, and 512. Reading the Condition register does not affect the bit settings. The bits are cleared following a reset (*RST).

The Transition Filter The Transition Filter specifies which type of bit transition in the Condition register will set corresponding bits in the Event register. Transition filter bits may be set for positive transitions ( 0 to 1), or negative transitions (1 to

0). The commands used to set the transitions are:

STATus:OPERation:NTRansition <unmask >

STATus:OPERation:PTRansition <unmask >

NTRansition sets the negative transition. For each bit unmasked, a 1-to-0 transition of that bit in the Condition register sets the associated bit in the Event register.

PTRansition sets the positive transition. For each bit unmasked, a 0-to-1 transition of that bit in the Condition register sets the associated bit in the Event register.

Chapter 3

Understanding the HP E1429 Digitizer 169

Page 169
Image 169
HP E1429A manual STATusOPERationCONDition?