/* write middle-significant-byte of post-arm count */ sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x79,8,0); IOOUTPUTS(CMD_MOD, command, strlen(command));

/* write most-significant-byte of post-arm count */

sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x7B,8,0); IOOUTPUTS(CMD_MOD, command, strlen(command));

/* initialize the sample rate registers */

sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x63,8,129); IOOUTPUTS(CMD_MOD, command, strlen(command));

sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x61,8,255); IOOUTPUTS(CMD_MOD, command, strlen(command));

/* disable reclocking of the reference divider (enabled for reference */ /* divider values of 100,000 or greater) */

sprintf(command, "DIAG:PEEK? %ld, %d", base_addr+0x4B,8); IOOUTPUTS(CMD_MOD, command, strlen(command)); IOENTER(CMD_MOD, &bit_pat);

/* retain register settings, disable reclocking */ bit_reg = (int)(bit_pat + ((bit_pat >= 0) ? .5 : -.5)); bit_reg = (bit_reg & 0xEF);

sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x4B,8,bit_reg); IOOUTPUTS(CMD_MOD, command, strlen(command));

/* set the sample rate to 10 kHz (100 us) */

/* set decade division register for a division by 1,000 */ sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x61,8,8); IOOUTPUTS(CMD_MOD, command, strlen(command));

/* set binary division register for a division by 2 */

sprintf(command, "DIAG:POKE %ld, %d, %d", base_addr+0x63,8,132); IOOUTPUTS(CMD_MOD, command, strlen(command));

/* For systems using an embedded controller, it may be necessary to monitor */ /* bit 1 of the arm status register (base + 43) until it is cleared (set to ’0’) */

/* before continuing with the next set of instructions. */

/* using the traffic register, set the pulse register as the high-speed */

/* clock source, write to the pulse register to remove any "old" readings */ /* from the data bus */

Continued on Next Page

Appendix C

Register Programming 397

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