NEC PD75P402, PD75402A user manual SBI Mode Operation, + Vdd, CPU SB0 SCK

CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS

5.5.6SBI Mode Operation

The SBI (serial bus interface) is a high-speed serial interface which conforms to the the NEC serial bus format. The SBI is a single-master high-speed serial bus. Its format includes the addition of bus configuration functions to the clocked serial I/O method to enable communication to be performed with multiple devices using two signal lines. Consequently, when a serial bus is configured with multiple microcomputers and peripheral ICs, it is possible

to reduce the number of ports used and the amount of wiring on the substrate.

The master can output to a slave on the serial data bus an address to select the target device for serial communication, a command which gives a directive to the target device, and actual data. The slave can determine by hardware whether the received data is an address, command or actual data. This function allows the serial interface control portion of the application program to be simplified.

SBI functions are incorporated in a number of devices including the 75X series, and 78K series 8-bit single-chip microcomputers.

An example of a serial bus configuration when CPUs and peripheral ICs with a serial interface conforming to the SBI are used is shown in Fig. 5-32.

In the SBI the SB0 serial data bus pin is an open-drain output and thus the serial data bus line is in the wired- OR state. The serial data bus line requires a pull-up resistor.

Fig. 5-32 Example of SBI Serial Bus System Configuration

+ VDD

Master

CPU

SB0

SCK

Seroal Data Bis

Serial Clock

SB0

SCK

SB0

SCK

• • •

SB0

SCK

Slave CPU

Address 1

Slave CPU

Address 2

• • •

Slave IC Address N

Note When master/slave exchange processing is performed, since serial clock line (SCK) input/output switching is performed asynchronously between master and slave, a pull-up resistor is also required for the serial clock line (SCK).

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