NEC PD75402A, PD75P402 - page 70

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CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
; Assume PCC = 0011.
MOV A, #0000
0.95
µ s/4.19 MHz MOV PCC, A ; PCC ← 0000
BR 16 machine cycles
15.3
µ s/4.19 MHz
5.2.3 CPU Clock Setting
The CPU clock Φ is the clock supplied to the µ PD75402A’s internal CPU, and the reciprocal of this clock is the
minimum instruction execution time (defined in this manual as 1 machine cycle).
On the
µ PD75402A, Φ can be switched in 3 steps by setting the PCC. In other words, with the same system clock
oscillator frequency fXX, the minimum instruction execution time can be changed in 3 steps. By using this function
to select operation at high speed (0.95
µ s: When operating at 4.19 MHz) when the power supply voltage is 5 V and
low-speed operation (15.3
µ s: When operating at 4.19 MHz) in backup mode, applications can be implemented in
which reduced current consumption and low-power operation is possible, which is an extremely useful facility.
Fig. 5-14 Use of Variable Minimum Instruction Execution Time Function
Note As explained in the previous section,
Φ is changed by a 4-bit memory handling instruction, but after a PCC
change, operation is at the pre-change Φ rate for the number of machine cycles shown in Table 5-5.
Example
0.95 µ s 15.3 µ s 0.95 µ s
➤ ➤
………… ………
5V
3V
Supply Voltage
Minimum Instruction
Execution Time
(4.19 MHz Operation)