NEC PD75P402 Instruction SET Instruction SET and ITS Operation, Operation description legend

CHAPTER 9. INSTRUCTION SET

9.2INSTRUCTION SET AND ITS OPERATION

(1) Operation identifier and description

The operands are described in the operand field of each instruction in accordance with the description for the operand identifier of the instruction. (See "RA 75X Assembler Package User's Manual Language Volume (EEU-730)for details.) For parameters with multiple elements in the description, one of the elements is selected. Upper case letters and the symbols #, @, !, and $ are key words and described unchanged.

For immediate data, a suitable value or label is described.

Instead of mem, fmem, bit, etc., various kinds of registers and flag symbols shown in Table 3-4 can be written as labels (however, in the case of fmem there are restrictions on the labels that can be written. See Table 3-3 "Applicable Addressing Modes at Peripheral Hardware Operation" and Table 3-4"μPD75402A I/O Map" for details.

Identifier	Description
reg	X, A, H, L
reg1	X, H, L
rp	XA, HL
n4	4-bit immediate data or label
n8	8-bit immediate data or label
mem	8-bit immediate data or label*
bit	2-bit immediate data or label
fmem	FB0H to FBFH, FF0H to FFFH immediate data or label
addr	11-bit immediate data or label
caddr	11-bit immediate data or label
faddr	11-bit immediate data or label
PORTn	PORT0 to PORT3, PORT5, PORT6
IE×××	IEBT, IECSI, IE0, IE2

*For 8-bit data processing, mem can describe even address only.

(2) Operation description legend

A	: A register; 4-bit accumulator
H	: H register
L	: L register
X	: X register
XA	: Register pair (XA); 8-bit accumulator
HL	: Register pair (HL)
PC	: Program counter
SP	: Stack pointer
CY	: Carry flag; bit accumulator
PSW	: Program status word
PORTn	: Port n (n = 0 to 3, 5, 6)
IME	: Interrupt master enable flag
IE×××	: Interrupt enable flag
PCC	: Processor clock control register
.	: Address, bit delimiter
( ×× )	: Contents addressed by ××
××H	: Hexadecimal data

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