NEC PD75P402 Internal CPU Functions Data Memory RAM, Data area, General register area, Stack area

CHAPTER 4. INTERNAL CPU FUNCTIONS

4.3DATA MEMORY (RAM)

The data memory consists of the data and peripheral hardware areas as shown in Fig. 4-3.

Fig. 4-3 Data Memory Map

			Data Memory			Memory Bank
	General		0 0 0 H	(4	× 4)
	Register Area		0 0 3 H
			0 0 4 H
Data Area							Bank 0
Static RAM			0 2 0 H				(64 × 4)
(64 × 4)
				(32 × 4)
		Stack Area
			0 3 F H

Not built in.

	F 8 0 H
Peripheral
		128	× 4	Bank 15
Hardware
Area
	F F F H

(1) Data area

The μPD75402A’s data area consists of the static RAM (64 words × 4 bits). The data area is used to store processing data and is operated by the memory manipulation instruction.

The static RAM is mapped to Memory bank 0 by 64 × 4 bits. While Bank 0 is mapped as the data area, it is also available as the general register area (000H to 003H) and the stack area (020H to 03FH).

In the static RAM, 1 address consists of 4 bits. It is possible either to operate per 8 bits by the 8-bit memory manipulation instruction or to operate per bit by the bit manipulation instruction, however. In the 8-bit manipulation instruction, an even address should be specified.

• General register area

Operation is possible either by the general register manipulation instruction or by the memory manipulation instruction. Up to four 4-bit registers are available. Of the 4 general registers, that part which is not used in the program is available as the data area (see 4.4 “GENERAL REGISTER”).

• Stack area

The stack area is set by an instruction and is available as the save area at the subroutine or interrupting process execution (see 4.6 “STACK POINTER”). In that case, the stack area is at the static RAM’s addresses 020H to 03FH.

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