CHAPTER 3. FEATURES OF ARCHITECTURE AND MEMORY MAP

3.2MEMORY-MAPPED I/O

The μPD75402A adopts memory-mapped I/O to map such peripheral hardware as the input/output port, serial interface at addresses F80H to FFFH in the data memory space shown in Table 3-1. As a result, there is no special instruction to control the peripheral hardware; the peripheral hardware is controlled wholly by memory manipu- lation instructions (some hardware control mnemonics are available to make the program easy to understand).

Table 3-3 shows the addressing modes available when operating the peripheral hardware.

Table 3-3 Applicable Addressing Modes at Peripheral Hardware Operation

 

Applicable Addressing Mode

Applicable Hardware

 

 

 

 

Specify the bit to be manipulated by the direct

All the hardware capable of bit

Bit manipulation

addressing mem.bit.

manipulation

 

 

Specify the bit to be manipulated by the direct

IE×××, IRQ×××, PORTn.×

 

 

addressing fmem.bit.

 

 

 

 

4-bit manipulation

Specify the address to be manipulated by the direct

All the hardware capable of 4-bit

addressing mem.

manipulation.

 

 

 

 

8-bit manipulation

Specify the address to be manipulated by the direct

All the hardware capable of 8-bit

addressing mem. Mem is an even address, however.

manipulation.

 

 

 

 

Table 3-4 summarizes the μPD75402A’s I/O map. The items shown in this table have the following meaning.

• Symbol:A name to indicate the address of the built-in hardware. It can be described in the instruction’s operand column. IME is excepted, however.

Number of manipulatable bits: The number of applicable processing bits when operating the relevant hardware. Such symbols as R/W, indicate whether the relevant hardware is readable/writable or not.

R/W : Readable/Writable

 

R

: Readable

 

W

: Writable

• Bit manipulation addressing:

The applicable bit manipulation addressing when bit manipulating the relevant

 

hardware.

28

Page 39
Image 39
NEC PD75402A, PD75P402 user manual Features of Architecture and Memory MAP MEMORY-MAPPED I/O