NEC PD75402A, PD75P402 - page 89

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CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
(2) Serial bus interface control register (SBIC)
The format of the serial bus interface control register (SBIC) is shown in Fig. 5-26.
SBIC is an 8-bit register composed of bits which control the serial bus and flags which indicate various statuses
of the input data from the serial bus, and is mainly used in the SBI mode.
SBIC is manipulated by bit-manipulation instructions; it cannot be manipulated by 4-bit or 8-bit memory
manipulation instructions.
Read/write capability differs from bit to bit (see Fig. 5-26).
Reset input clears this register to 00H.
Note In the 3-wire serial I/O mode, only the following bits can be used:
• Bus release trigger bit (RELT) … SO latch setting
• Command trigger bit (CMDT) … SO latch clearing
Fig. 5-26 Serial Bus Interface Control Register (SBIC) Format (1/3)
Address 7 6 5 4 3 2 1 0 Symbol
FE2H BSYE ACKD ACKE ACKT CMDD RELD CMDT RELT SBIC
Bus Release Trigger Bit (W)
Command Trigger Bit (W)
Bus Release Datection Flag (R)
Command Detection Flag (R)
Acknowledge Trigger Bit (W)
Acknowledge Enable Bit (R/W)
Acknowledge Detection Flag (R)
Busy Enable Bit (R/W)
Remarks (R) Read only
(W) Write only
(R/W) Read/write enabled