NEC PD75P402, PD75402A user manual Digital Input/Output Port Input/Output Timing

CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS

5.1.6Digital Input/Output Port Input/Output Timing

The timing for outputting data to the output latch and fetching pin data or output latch data onto the internal bus

is shown in Fig. 5-9.

Fig. 5-9 Digital Input/Output Port Input/Output Timing

(a) Data fetch by 1-machine-cycle instruction

Instruction Execution

1-Machine Cycles

Manipulation

Instruction

Input Timing

(b) Data fetch by 2-machine-cycle instruction

Instruction Execution

2-Machine Cycles

Manipulation Instruction

Input Timing

(c)Data latching by 1-machine-cycle instruction

Instruction Execution

Φ￿3 Φ￿0 Φ￿1

Manipulation Instruction

Output Latch

(Output Pin)

(d) Data latching by 2-machine-cycle instruction

Instruction Execution

Φ￿0 Φ￿1

Manipulation Instruction

Output Latch (Output Pin)

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