NEC PD75P402 user manual Differences Between μPD75402A and μPD75402, Stop

CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS

5.2.4Differences Between μPD75402A and μPD75402

Part of the clock generation circuit differs between the μPD75402A and the μPD75402. The μPD75402 does not include the sections enclosed in dotted lines.

Fig. 5-16 Clock Generation Circuit - Differences between μPD75402A and μPD75402

• Basic Interva Timer (BT)

• Clock Output Circuit

• Serial Interface

• INT0 Noise Eliminator

• Clock Output Circuit

X1

VDD

		System		1/16 to 1/512
		Clock	fXX or fX
		Oscillation		Frequency Divider
		Circuit	1/2	1/6
		X2
		STOP		Selector	Frequency
		Oscillation
					Divider	Φ￿
					1/4
		PCC				• CPU
						• INT0 Noise
		0				Eliminator
						• Clock Output
						Circuit
		PCC1
Bus	4			HALT F/F
		PCC2
				S
Internal	HALT*
		PCC3
	STOP*			R	Q
		Clear
		all bits
		STOP F/F			RESET Input Rising Edge
	Clear				Detection Signal
	PCC2	Q	S
					RESET Input Falling Edga
					Detection Signal
			R
					Standby Release Signal from
					Interrupt Control Circuit

*Instruction execution

Remarks 1. fXX = System clock frequency

2.fX = external clock frequency

3.PCC: Processor clock control register

4.1 clock cycle (tCY) of Φ is 1 machine cycle of an instruction.

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