NEC PD75P402 Serial clock selection bit W, Serial interface operating mode selection bit W

Address

FE0H

CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS

Fig. 5-25 Serial Operating Mode Register (CSIM) Format (1/2)

7	6	5	4	3	2	1	0	Symbol
CSIE	COI	WUP	0	CSIM3	0	CSIM1	0	CSIM

Serial Clock Selection Bit (W)

Serial Interface Operating Mode Selection Bit (W)

Wake-up Function Specification Bit (W)

Signal from Address Comparator (R)

Serial Interface Operation Enable/Disable Specification Bit (W)

Remarks (R) Read only

(W) Write only

Note 0 must be written to CSIM bits 4, 2, 0.

Serial clock selection bit (W)

		Serial Clock
CSIM1					SCK Pin Mode
	3-Wire Serial I/O Mode			SBI Mode
0	Input clock to		SCK	pin from off chip		Input
1		fXX/24 (262 kHz)				Output

Remarks ( ) When fXX = 4.19 MHz

Serial interface operating mode selection bit (W)

CSIM3	Operating Mode	Shift Register	SO Pin Function	SI Pin Function
		Bit Order
0	3-wire serial	SIO 7 to 0 ↔ XA	SO/P02	SI/P03
	I/O mode	(MBS-first transfer)	(CMOS output)	(Input)
1	SBI mode	SIO 7 to 0 ↔ XA	SB0/P02	P03 input
		(MBS-first transfer)	(N-ch open-drain
			input/output)

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