Texas Instruments MSP50C614 manual ±11. Symbols and Explanation, ±11. Instruction Classification

	Instruction Classification
Table 4±11. Symbols and Explanation (Continued)
Symbol	Explanation
next A	Accumulator control bits as described in Table 4±6.
[next A]	The preincrement (++A) or predecrement (±±A) operation on accumulator pointers An or An~.
Not	NOT condition on conditional jumps, conditional calls or test flag instructions.
nR	Value in the repeat counter loaded by repeat instruction.
ns	Value in string register STR.
offset[n]	n bit offset from a reference register.
pma[n]	n bit program memory address. For example, pma8 means 8-bit program memory address. If n
	is not specified, defaults to pma16.
port[n]	n bit I/O port address.
R	Rx registers are treated as general purpose registers. These bits are not related to any addres-
	sing modes.
Rx	Indirect register bits as described in Table 4±3.
s	Represents string mode if 1, otherwise normal mode.
x	Don't care

Instructions on the MSP50P614/MSP50C614 are classified based on the op- erations the instruction group performs (see Table 4±11). Each instruction group is referred to as a class. There are 9 instruction classes. Classes are subdivided into subclasses. Classes and opcode definitions are shown in Table 4±11.

Table 4±11. Instruction Classification

Class Sub- Description

Class

1 Accumulator and memory reference instructions

AAccumulator and memory references with or without string operations and accumulator preincrementing

BAccumulator and memory references with or without string operations

2Accumulator constant reference

A Short constant to accumulator

B Long constant to accumulator

3Accumulator reference instructions with no addressing modes

Assembly Language Instructions 4-23