Texas Instruments MSP50C614 manual Comparator

Models: MSP50C614

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Comparator

3.3 Comparator

The C614 provides a simple comparator that is enabled by a control register option. The inputs of the comparator are shared with pins PD4 and PD5. PD5 is the noninverting input to the comparator, and PD4 is the inverting input.

When the comparator is enabled, the conditional operation COND2 (normally associated with PD1) becomes associated with the comparator result. In addi- tion, the interrupts associated with PD4 and PD5 (namely, INT6 and INT7), be- come interrupts based on a transition in the comparator result. Finally, the start/stop function of TIMER1 may be controlled, indirectly, by a comparator transition. When enabled, therefore, the comparator controls the following four events:

(1) Steady-State Comparator TRUE

VPD5 > VPD4

 

COND2 = TRUE . . .

CIN2

has its conditional call taken.

JIN2

has its conditional jump taken.

CNIN2

has its conditional call ignored.

JNIN2

has its conditional jump ignored.

 

 

 

 

(2) Steady-State Comparator FALSE

VPD5 < VPD4

 

COND2 = FALSE . . .

CIN2

has its conditional call ignored.

JIN2

has its conditional jump ignored.

CNIN2

has its conditional call taken.

JNIN2

has its conditional jump taken.

(3) Comparator transition FALSE-to-TRUE

VPD5 rises above VPD4 . . .

INT6 trigger event

 

IF:

[(INT6 Flag is SET) OR (INT7 Flag is CLEAR)] AND (TIMER1 Enable is CLEAR)

THEN: TIMER1 stops counting

 

 

 

(4) Comparator transition TRUE-to-FALSE

VPD5 falls below VPD4 . . .

INT7 trigger event

 

IF:

[(INT6 Flag is CLEAR) AND (INT7 Flag is SET)] OR (TIMER1 Enable is SET)]

THEN: TIMER1 starts counting

 

 

 

 

With regards to the transition events, the rising-edge in the comparator is a

 

trigger for INT6. This happens independently of any activity associated with

 

TIMER1. TIMER1, on the other hand, comes to a stop anytime the following

 

conditional is true:

 

 

 

IF:

[(INT6 Flag is SET) OR (INT7 Flag is CLEAR)] AND (TIMER1 Enable is CLEAR)]

THEN:

TIMER1 stops counting

 

 

 

 

INT6 flag refers to bit 6 within the interrupt flag register (IFR, peripheral port 0x39). This bit is automatically SET anytime that an INT6 event occurs. The

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Page 84
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Texas Instruments MSP50C614 manual Comparator