Texas Instruments MSP50C614 manual Tables

Tables

1±1	Signal and Pad Descriptions for the C614	1-10
1±2	MSP50C614 100-Pin PJM Plastic Package Pinout Description	1-11
2±1	Signed and Unsigned Integer Representation	2-5
2±2	Summary of C614's Peripheral Communications Ports	2-17
2±3	Programmable Bits Needed to Control Reduced Power Modes	2-37
2±4	Status of Circuitry When in Reduced Power Modes	2-38
2±5	How to Wake-Up from Reduced Power Modes	2-39
2±6	Destination of Program Counter on Wake-Up Under Various Conditions	2-40
3±1	Interrupts	3-7
3±2	State of the Status Register (17 bit) after RESET Low-to-High	3-21
4±1	Status Register (STAT)	4-7
4±2	Addressing Mode Encoding	4-9
4±3	Rx Bit Description	4-10
4±4	Addressing Mode Bits and {adrs} Field Description	4-10
4±5	MSP50P614/MSP50C614 Addressing Modes Summary	4-11
4±6	Auto Increment and Auto Decrement Modes	4-11
4±7	Flag Addressing Field {flagadrs} for Certain Flag Instructions (Class 8a)	4-12
4±8	Initial Processor State for the Examples Before Execution of Instruction	4-13
4±9	Indirect Addressing Syntax	4-15
4±10	Symbols and Explanation	4-22
4±11	Instruction Classification	4-23
4±12	Classes and Opcode Definition	4-25
4±13	Class 1 Instruction Encoding	4-26
4±14	Class 1a Instruction Description	4-26
4±15	Class 1b Instruction Description	4-27
4±16	Class 2 Instruction Encoding	4-29
4±17	Class 2a Instruction Descritpion	4-29
4±18	Class 2b Insstruction Description	4-30
4±19	Class 3 Instruction Encoding	4-31
4±20	Class 3 Instsruction Description	4-31
4±21	Class 4a Instruction Encoding	4-34
4±22	Class 4a Instruction Description	4-35
4±23	Class 4b Instruction Description	4-35
4±24	Class 4c Instruction Description	4-35

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