Individual Instruction Descriptions

4.14.68 SHLAPL

 

Shift Left with Accumulate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Syntax

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[label]

name

 

dest, src [, mod]

 

 

 

 

Clock, clk

Word, w

 

 

With RPT, clk

 

Class

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SHLAPL

 

An, {adrs}

 

 

 

 

 

 

 

 

Table 4±46

 

 

 

 

Table 4±46

 

 

1b

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SHLAPL

 

An[~], An[~] [, next A]

 

 

 

 

1

 

 

 

 

 

1

 

 

 

 

 

nR+3

 

 

 

 

3

Execution

[premodify AP if mod specified]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PH, PL ⇐

 

src << SV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

dest ⇐ dest + PL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PC ⇐ PC + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags Affected

OF, SF, ZF, CF are set accordingly

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

src is {adrs}:

 

 

TAG bit is set accordingly

 

 

 

 

 

 

 

 

 

 

 

 

Opcode

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instructions

 

16

 

15

 

14

13

 

12

 

11

 

10

 

9

 

8

 

7

 

6

 

5

 

4

 

3

 

2

 

1

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SHLAPL An, {adrs}

 

0

 

1

 

1

1

 

1

 

0

 

0

 

An

 

 

 

 

 

 

 

 

 

adrs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

x

 

 

 

 

dma16 (for direct) or offset16 (long relative) [see section 4.13]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SHLAPL An[~], An[~] [, next A]

1

 

1

 

1

0

 

0

 

next A

 

An

 

 

1

 

1

 

1

 

0

 

1

 

0

 

A~

 

~A

Description Premodify the accumulator pointer if specified. Shift accumulator word or data memory word pointed by {adrs} to left nSV bits (as specified by the SV register) into a 32-bit result. This result is zero-filled on the right and either zero-filled or sign-extended on the left (based on the setting of the extended sign mode (XM) bit in the status register). The upper 16 bits are latched into the product high (PH) register. The lower 16 bits of the result [product low (PL) register] is added to the destination accumulator (or its offset). This instruction propagates the shifted bits to the next accumulator.

Syntax

 

Description

 

 

 

SHLAPL An, {adrs}

 

Shift data memory word left, add PL to An

 

 

SHLAPL An[~], An[~] [, next A]

Shift An[~] left, add PL to An[~]

See Also

SHLAPLS, SHLTPL , SHLTPLS, SHLSPL, SHLSPLS

Example 4.14.68.1 SHLAPL A0, *R4++R5

Shift the word pointed by the byte address stored in R4 by nSV bits to the left, add the shifted value (PL) with accumulator A0, store the result in accumulator A0. Add R5 to R4 and store result in R4. PH holds the upper 16 bits of the shift.

Example 4.14.68.2

SHLAPL A2, *R1++

Shift the word pointed by the byte address stored in R1 by nSV bits to the left, add the shifted value (PL) with the accumulator (A2), and store the result in accumulator A2. Increment R1 (by 2) . PH holds the upper 16 bits of the shift.

Example 4.14.68.3 SHLAPL A1, A1, ++A

Preincrement accumulator pointer AP1. Shift the accumulator A1 by nSV bits to the left, add the shifted value (PL) to the accumulator and store the result in accumulator (A1). After execution PH contains the upper 16 bits of the 32 bit shift.

Assembly Language Instructions

4-163

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Page 255
Image 255
Texas Instruments MSP50C614 Shlapl Shift Left with Accumulate, Example 4.14.68.1 Shlapl A0, *R4++R5, Shlapl A2, *R1++
Page 254 Page 256

MSP50C614 specifications

The Texas Instruments MSP50C614 is a microcontroller that belongs to the MSP430 family, renowned for its low power consumption and versatile functionality. Primarily designed for embedded applications, this microcontroller is favored in various industries, including consumer electronics, industrial automation, and healthcare devices.

One of the standout features of the MSP50C614 is its ultra-low power technology, which enables it to operate in various power modes. This makes it ideal for battery-powered applications, where energy efficiency is crucial. The MSP430 architecture allows for a flexible power management system, ensuring that energy is conserved while providing robust performance.

The MSP50C614 is equipped with a 16-bit RISC CPU that delivers high performance while maintaining low power usage. With a maximum clock frequency of 16 MHz, it can execute most instructions in a single cycle, resulting in swift operation and responsive performance. This microcontroller also comes with a generous flash memory capacity, allowing developers to store large amounts of code and data conveniently.

In terms of peripherals, the MSP50C614 is highly versatile. It features a range of digital and analog input/output options, including multiple timers, GPIO ports, and various communication interfaces like UART, SPI, and I2C. This extensive set of peripherals allows for seamless integration with other components and simplifies the design of complex systems.

The integrated 12-bit Analog-to-Digital Converter (ADC) stands out as a valuable characteristic of the MSP50C614. This feature enables the microcontroller to convert physical analog signals into digital data, making it particularly useful for sensing applications and real-time monitoring.

Another noteworthy technology employed in the MSP50C614 is its support for low-voltage operations. With a broad supply voltage range, this microcontroller can function efficiently in diverse environments and is suitable for low-power applications, enhancing its practicality.

Moreover, Texas Instruments provides software support in the form of Code Composer Studio and various libraries that make it easier for developers to program and utilize the MSP50C614 effectively.

In summary, the Texas Instruments MSP50C614 microcontroller is a powerful, low-power solution equipped with the features and technologies necessary for efficient operation in a wide array of applications. Its blend of performance, flexibility, and energy efficiency makes it a popular choice among engineers and designers looking to create innovative, sustainable designs in the rapidly evolving tech landscape.
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