Toshiba r500 manual System Unit Block Diagram Hardware Overview

1.2 System Unit Block Diagram 1 Hardware Overview

The system unit is composed of the following major components:

‰Processor

Intel® CoreTM 2 Duo ULV

•Core speed:

Speed 1.2GHz (U7600)/ 1.06GHz (U7500)

–Integrated L1 cache memory of 64KB (32KB +32KB)

–Integrated L2 cache memory of 2MB

–Processor bus speed: 533MHz

–Core voltage: 1.05

–478-pin Micro FC-PGA package

( ): Processor Number

‰Memory

One memory slots capable of accepting DDR2-SDRAM 512MB or 1024MB memory modules for a maximum of 2GB（on board 1GB）.

•200-pin Small Outline DIMM

•1.8V operation

•PC2-4200(DDR2-533)/PC2-5300(DDR2-667) support

‰North Bridge

•Intel Calistoga GMS(Intel 945GMS)

–Processor Support: Core 2 Duo ULV (case of PORTEGE R500)

–Supports System Memory : DDR2-400/DDR2-533/DDR2-667, 2GB(max)

–Internal Graphics Controller : Inter Generation 3.5 Integrated GFX Core

–DMI(Direct Media Interface)

–Supports ICH.

–998-ball 27×27mm Bell Pitch 0.8mm FC-BGA package

PORTEGE R500 Maintenance Manual (960-634) [CONFIDENTIAL] 1-9