Overview of LocalLink Interface, Data Flow

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Appendix A: Using the Client-Side FIFO

Overview of LocalLink Interface

Data Flow

Data is transferred on the LocalLink interface from source to destination, with the flow being governed by the four active low control signals sof_n, eof_n, src_rdy_n, and dst_rdy_n. The flow of data is controlled by the src_rdy_n and dst_rdy_n signals. Only when these signals are asserted simultaneously is data transferred from source to destination. The individual packet boundaries are marked by the sof_n and eof_n signals. For more information on the LocalLink interface see to Xilinx Application Note XAPP691, “Parameterizable LocalLink FIFO” available at direct.xilinx.com/bvdocs/appnotes/xapp691.pdf.

Figure A-2shows the transfer of an 8-byte frame.

clock
data[7:0]	0	1	2	3	4	5	6	7
sof_n
eof_n
src_rdy_n
dst_rdy_n

Figure A-2:Frame Transfer across LocalLink Interface

Figure A-3illustrates frame transfer of a 5-byte frame, where both the src_rdy_n and dst_rdy_n signals are used to control the flow of data across the interface.

clock

data[7:0]

sof_n

eof_n

src_rdy_n

dst_rdy_n

Figure A-3:Frame Transfer with Flow Control

130	www.xilinx.com	1-Gigabit Ethernet MAC v8.5 User Guide
		UG144 April 24, 2009

UG144 specifications

The Xilinx UG144, a comprehensive user guide for the versatile Zynq-7000 SoC (System on Chip) architecture, serves as an essential resource for developers and engineers designing embedded systems. Emphasizing the blend of programmable logic and processing power, this guide highlights the array of features and technologies that make the Zynq-7000 series particularly attractive for a wide range of applications.

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Xilinx UG144 manual Overview of LocalLink Interface, Data Flow

Models: UG144