R

-- DISCONTINUED PRODUCT --

Chapter 5: Using the Client Side Data Path

Table 5-2:Bit Definition for the Receiver Statistics Vector

rx_statistics_vector

Name

Description

bit(s)

 

 

 

 

 

20

Out of Bounds

Asserted if the previous frame exceeded the

 

 

specified IEEE802.3-2005maximum legal

 

 

length (see “Maximum Permitted Frame

 

 

Length”). This is only valid if jumbo frames

 

 

are disabled.

 

 

 

19

Control Frame

Asserted if the previous frame contained the

 

 

special control frame identifier in the

 

 

length/type field.

 

 

 

18:5

Frame Length

The length of the previous frame in number of

 

 

bytes. The count will stick at 16,383 for any

 

 

jumbo frames larger than this value.

 

 

 

4

Multicast Frame

Asserted if the previous frame contained a

 

 

multicast address in the destination address

 

 

field.

 

 

 

3

Broadcast Frame

Asserted if the previous frame contained the

 

 

broadcast address in the destination address

 

 

field.

 

 

 

2

FCS Error

Asserted if the previous frame received had an

 

 

incorrect FCS value or the MAC detected error

 

 

codes during frame reception.

 

 

 

1

Bad Frame

Asserted if the previous frame received

 

 

contained errors.

 

 

 

0

Good Frame

Asserted if the previous frame received was

 

 

error-free.

 

 

 

Table 5-3provides conversion information against previous versions of the GEMAC.

Table 5-3:Rx Statistics conversion to previous core GEMAC core versions

Version 8.5

Version 8.4 (and earlier)

 

rx_statistics_vector

rx_statistics_vector

Notes

bit(s)

bit(s)

 

 

 

 

27

26

Bit 27 is equivalent to bit 26

 

 

of all previous core

 

 

versions.

 

 

 

26

N/A

Bit 26 (reserved) has been

 

 

inserted into version 8.5 for

 

 

statistic vector

 

 

compatibility with the Tri-

 

 

Mode Ethernet MAC

 

 

LogiCORE™.

 

 

 

25:0

25:0

No differences

 

 

 

46

www.xilinx.com

1-Gigabit Ethernet MAC v8.5 User Guide

 

 

UG144 April 24, 2009

Page 46
Image 46
Xilinx UG144 manual Length see Maximum Permitted Frame

UG144 specifications

The Xilinx UG144, a comprehensive user guide for the versatile Zynq-7000 SoC (System on Chip) architecture, serves as an essential resource for developers and engineers designing embedded systems. Emphasizing the blend of programmable logic and processing power, this guide highlights the array of features and technologies that make the Zynq-7000 series particularly attractive for a wide range of applications.

One of the standout characteristics of the Zynq-7000 is its dual-core ARM Cortex-A9 processor, which delivers substantial performance for complex processing tasks. This soft processor enables high-speed computation, making it ideal for applications in fields such as automotive, industrial automation, and telecommunications. The guide emphasizes the ability to run multiple operating systems, including Linux and real-time operating systems, providing developers with versatile options for application design.

Additionally, the Xilinx UG144 outlines the extensive programmable logic resources integrated within the Zynq-7000 device. This FPGA fabric allows for customization and parallel processing capabilities, allowing designers to create powerful hardware accelerators tailored to specific application needs. The guide details how these programmable logic resources can easily interface with the ARM processors through a high-bandwidth AXI interface, promoting efficient data flow between the hardware and software components.

Key features highlighted in the UG144 include advanced connectivity options, including PCIe, USB, and Serial interfaces, which facilitate communication with other devices and systems. Furthermore, the guide provides insights into the supported design tools, such as the Xilinx Vivado Design Suite, which aids in both hardware and software co-design. This integrated environment significantly reduces development time while providing an efficient workflow for prototyping and testing.

In terms of performance optimizations, the guide discusses support for digital signal processing (DSP) capabilities, making the Zynq-7000 suitable for high-performance applications such as video processing and data analytics. The built-in DSP slices allow for efficient execution of complex mathematical functions, which is crucial for real-time data processing tasks.

Overall, the Xilinx UG144 guide encapsulates the versatility, performance, and flexibility of the Zynq-7000 SoC architecture. With its combination of ARM processing and programmable logic, along with robust connectivity options and development tools, it empowers engineers to create innovative solutions across a spectrum of industries, solidifying Xilinx's position as a leader in the field of embedded system design.