R

-- DISCONTINUED PRODUCT --

Chapter 7: Using the Physical Side Interface

Implementing External RGMII

The HDL example design delivered with the core implements an external RGMII when RGMII is selected from the CORE Generator GUI (see Chapter 3, “Generating the Core”). For more information about using the example design, see the 1-Gigabit Ethernet MAC Getting Started Guide.

RGMII Transmitter Logic

Spartan-3, Spartan-3E, Spartan-3A and Spartan-3A DSP Devices

Figure 7-4illustrates how to use the physical transmitter interface of the core to create an external RGMII in a Spartan-3 device. The signal names and logic precisely match those delivered with the example design when the RGMII is selected. If other families are used, equivalent primitives and logic specific to that family is used in the example design.

IOB LOGIC

IOB LOGIC

IBUFG

gtx_clk

IPAD

DCM

CLK90

CLKIN

FB CLK0

 

 

 

 

 

 

FDDRRSE

BUFG

 

 

 

 

 

 

 

 

rgmii_tx_clk_bufg

 

 

 

 

 

 

 

 

 

 

'1'

 

 

D

Q

 

 

 

 

 

 

 

 

 

 

 

 

OBUF

 

 

 

 

 

 

 

 

 

rgmii_txc

 

gtx_clk_bufg

'0'

 

 

 

 

 

OPAD

 

 

 

 

 

 

 

 

 

D

Q

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOB LOGIC

1-Gigabit Ethernet MAC Core

gtx_clk

gmii_txd_int[0]

gmii_txd[0]

FDDRRSE

D QD Q

OBUF

rgmii_txd[0]

OPAD

gmii_txd[4]

gmii_txd_int[4]

D Q

D Q

D Q

 

 

 

 

 

 

FDDRRSE

gmii_tx_en

gmii_tx_en_int

Q

 

 

 

D

Q

D

 

 

 

 

 

 

 

 

 

 

OBUF

gmii_tx_er

gmii_tx_er_int

D

Q

D

Q

D

Q

 

rgmii_tx_ctl

OPAD

Figure 7-4:External RGMII Transmitter Logic

66

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1-Gigabit Ethernet MAC v8.5 User Guide

 

 

UG144 April 24, 2009

Page 66
Image 66
Xilinx UG144 manual Implementing External Rgmii, Rgmii Transmitter Logic

UG144 specifications

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