-- DISCONTINUED PRODUCT --

Implementing External GMII

R

GMII Receiver Logic

Spartan-3, Spartan-3E, Spartan-3A and Virtex-4 Devices

ADCM must be used on the gmii_rx_clk clock path, as illustrated in Figure 7-2, to meet the input setup and hold requirements for GMII. This is performed by the example designs delivered with the core (all signal names and logic match Figure 7-2). This DCM circuitry may optionally be used in other families.

Phase-shifting may then be applied to the DCM to fine-tune the setup and hold times at the GMII IOB input flip-flops. Fixed phase-shift is applied to the DCM with the example UCF for the example design. See Appendix C, “Calculating DCM Phase-Shifting.”

 

 

 

 

 

IOB LOGIC

 

BUFG

DCM

IBUFG

 

 

 

 

gmii_rx_clk

 

 

gmii_rx_clk0

 

 

 

 

 

CLK0 CLKIN

 

IPAD

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FB

 

 

 

 

 

 

 

 

gmii_rx_clk

gmii_rx_clk_bufg

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOB LOGIC

 

 

 

 

 

IBUF

 

gmii_rxd_reg[0]

 

 

 

gmii_rxd[0]

gmii_rxd[0]

Q D

 

 

IPAD

 

 

 

 

 

 

 

 

 

 

 

IBUF

 

gmii_rx_dv_reg

 

gmii_rx_dv

gmii_rx_dv

 

 

 

Q D

 

IPAD

 

 

 

 

IBUF

 

gmii_rx_er_reg

 

gmii_rx_er

gmii_rx_er

 

 

Q D

 

IPAD

 

 

Figure 7-2:External GMII Receiver Logic for Spartan-3, Spartan-3E, and Spartan-3A Devices

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UG144 April 24, 2009

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Xilinx UG144 manual Gmii Receiver Logic, Spartan-3, Spartan-3E, Spartan-3A and Virtex-4 Devices, Implementing External Gmii

UG144 specifications

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