Transmitting Outbound Frames, Padding | Xilinx UG144 specification

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Transmitting Outbound Frames

Ethernet frames to be transmitted are presented to the client logic on the Transmitter subset of the Client-Side Interface. For port definition, see “Transmitter Interface,” on page 26.

Normal Frame Transmission

Figure 5-6illustrates the timing of a normal outbound frame transfer. When the client wishes to transmit a frame, it places the first column of data onto the tx_data port and asserts a ‘1’ onto tx_data_valid.

When the GEMAC core has read this first byte of data, and in accordance with flow control requests and interpacket gap requirements, it will assert the tx_ack signal; on the next and subsequent rising clock edges, the client must provide the remainder of the data for the frame.

The end of frame is signalled to the GEMAC core by taking tx_data_valid low.

For maximum flexibility in switching and routing applications, the Ethernet frame parameters (destination address, source address, length/type and optionally FCS) are encoded within the same data stream that the frame payload is transferred upon, rather than on separate ports. This is illustrated in the timing diagrams. Definitions of the abbreviations used in the timing diagrams are defined in Table 5-1.

gtx_clk

tx_data[7:0]

DA SA L/T DATA

tx_data_valid

tx_ack

tx_underrun

Figure 5-6:Normal Frame Transmission

Padding

When fewer than 46 bytes of data are supplied by the client to the GEMAC core, the transmitter module will add padding up to the minimum frame length. The exception to this is when the GEMAC core is configured for client-passed FCS; in this case, the client must also supply the padding to maintain the minimum frame length. See “Client- Supplied FCS Passing” for more information.

1-Gigabit Ethernet MAC v8.5 User Guide

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UG144 April 24, 2009

UG144 specifications

The Xilinx UG144, a comprehensive user guide for the versatile Zynq-7000 SoC (System on Chip) architecture, serves as an essential resource for developers and engineers designing embedded systems. Emphasizing the blend of programmable logic and processing power, this guide highlights the array of features and technologies that make the Zynq-7000 series particularly attractive for a wide range of applications.

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Xilinx UG144 manual Transmitting Outbound Frames, Normal Frame Transmission, Padding

Models: UG144

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Transmitting Outbound Frames

Transmitting Outbound Frames

Normal Frame Transmission

Figure 5-6illustrates the timing of a normal outbound frame transfer. When the client wishes to transmit a frame, it places the first column of data onto the tx_data port and asserts a ‘1’ onto tx_data_valid.

When the GEMAC core has read this first byte of data, and in accordance with flow control requests and interpacket gap requirements, it will assert the tx_ack signal; on the next and subsequent rising clock edges, the client must provide the remainder of the data for the frame.

The end of frame is signalled to the GEMAC core by taking tx_data_valid low.

Figure 5-6:Normal Frame Transmission

Padding

1-Gigabit Ethernet MAC v8.5 User Guide

UG144 specifications