MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 16-1

Chapter 16

32-Kbyte System SRAM

16.1 Introduction

This chapter explains the operation of the MCF548x 32-Kbyte system SRAM.

16.1.1 Block Diagram

The system SRAM is organized as four 8-Kbyte banks, each organized as 2048 × 32-bits. The four banks
occupy a contiguous block of memory but can be optionally interleaved on long-word boundaries. When
configured for interleaved access, each bank contains the data for long word address modulo {bank #} (e.g.
bank 2 contains data for all long word address modulo 2 locations). Figure 16-1 shows the SRAM
organization in both linear and interleaved modes.
Figure 16-1. SRAM Organization
Linear Organization
Bank 0
Bank 1
Bank 2
Bank 3
0x1_0000 Long Word 0
0x1_0004 Long Word 1
Long Word 2
Long Word 2047
0x1_0008
0x1_1FFC
.
.
.
0x1_2000 Long Word 2048
0x1_2004 Long Word 2049
Long Word 2050
Long Word 4095
0x1_2008
0x1_3FFC
.
.
.
0x1_4000 Long Word 4096
0x1_4004 Long Word 4097
Long Word 4098
Long Word 6143
0x1_4008
0x1_5FFC
.
.
.
0x1_6000 Long Word 6144
0x1_6004 Long Word 6145
Long Word 6146
Long Word 8191
0x1_6008
0x1_7FFC
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Interleaved Organization
0x1_0000 Long Word 0
0x1_0010 Long Word 4
Long Word 8
Long Word 8188
0x1_0020
0x1_7FF0
.
.
.
0x1_0004 Long Word 1
0x1_0014 Long Word 5
Long Word 9
Long Word 8189
0x1_0024
0x1_7FF4
.
.
.
0x1_0008 Long Word 2
0x1_0018 Long Word 6
Long Word 10
Long Word 8190
0x1_0028
0x1_7FF8
.
.
.
0x1_000C Long Word 3
0x1_001C Long Word 7
Long Word 11
Long Word 8191
0x1_002C
0x1_7FFC
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Bank 0
Bank 1
Bank 2
Bank 3
Byte Address Byte Address