Memory Map/Register Definition
MCF548x Reference Manual, Rev. 3
Freescale Semiconductor 29-37

29.2.5.3 USB Endpoint n Interrupt Mask Register (EPnIMR)

The EPnIMR allows software to mask individual interrupts for each endpoint by masking the

corresponding bits in the EPISR. Writing a 1 to a bit in this register masks the corresponding interrupt in

the EPnISR. Writing a 0 unmasks the interrupt.

3 Reserved, should be cleared.
2 EOT End of transfer. This is the end of transfer indicator. This indicates that the last packet of a USB OUT
data transfer has crossed out of the USB. The last packet is identified by its length. Any packet
shorter than the maximum packet size for the associated OUT endpoint is considered to be an end
of transfer marker. In addition, for isochronous and interrupt endpoints only, the EOT interrupt will
assert when the end of any OUT packet crosses out of the USB. Note, the EOT interrupt will not
assert for an isochronous OUT packet that experiences a PID sequencing error.
In general, the EOT interrupt will be accompanied by a corresponding EOF interrupt. However, there
is a case where EOT will be set without a corresponding EOF interrupt. That is the NULL packet
case. Because a NULL packet signifies the end of transfer without actually writing any data to the
endpoint FIFO, the EOT interrupt will assert without the EOF interrupt.
1 Reserved, should be cleared.
0 EOF End of frame. This is the end of frame indicator. This indicates end of frame activity for this endpoint.
This bit monitors the data flow between the FIFO and the USB module and indicates when the end
of a USB packet is written into the FIFO or the USB module as the end of a frame.
0 End of frame (USB packet) was not received.
1 End of frame (USB packet) sent/received.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R00000000000000 0 0
W
Reset Uninitialized
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R0000000FUEMTERRFIFO
HI
FIFO
LO
0EOT 0 EOF
W
Reset Uninitialized 1 1 1 1 1 Unin. 1 Unin. 1
Reg
Addr
MBAR + 0xB448 (EP0IMR); 0xB478 (EP1IMR); 0xB4A8 (EP2IMR); 0xB4D8 (EP3IMR);
0xB508 (EP4IMR); 0xB538 (EP5IMR); 0xB568 (EP6IMR)

Figure 29-43. USB Endpoint n Interrupt Mask Register (EPnIMR)

Table 29-37. EPnISR Field Descriptions

Bits Name Description