Intel 8080 manual II. Gated Buffer 3·STATE, Are 3-state, Basic Schematic Symbols

SCHOTTKY BIPOLAR 8212

Applications Of The 8212 -- For Microcomputer Systems

IBasic Schematic Symbol

II Gated Buffer

III Bi-Directional Bus Driver IV Interrupting Input Port

V Interrupt Instruction Port VI Output Port

I. Basic Schematic Symbols

Two examples of ways to draw the 8212 on system schematics-(1) the top being the detailed view showing pin numbers, and (2) the bottom being the symbolic view showing the system input or output

VII 8080 Status Latch

VIII 8008 System

IX 8080 System:

8 Input Ports

8 Output Ports

8 Level Priority Interrupt

as a system bus (bus containing 8 parallel lines). The output to the data bus is symbolic in referenc- ing 8 parallel lines.

BASIC SCHEMATIC SYMBOLS

	INPUT DEVICE		OUTPUT DEVICE
					11~-~­
3	01		3	01	STB DO			4
5			5					6
7			7					8
9			9					10
16	8212	(DETAILED)	16		8212			15
18			18
								17
20			20	-		--		19
			22	INT		CLR		21
			23	/	MD		'"14
				DS2		I	~
				13		2		1
INPUT					Vee
						_ --- .... - OUTPUT
STROBE								FLAG
SYSTEM	8212	(SYMBOLIC)			8212			SYSTEM
INPUT								OUTPUT
	CLR INT			INT		CLR
	GND	DATA BUS	DATA BUS

II. Gated Buffer ( 3·STATE)

The simplest use of the 8212 is that of a gated buffer. By tying the mode signal low and the strobe input high, the data latch is acting as a straight through gate. The output buffers are then enabled from the device selection logic 051 and 052.

When the device selection logic is false, the outputs

are 3-state.

When the device selection logic is true, the input data from the system is directly transferred to the output. The input data load is 250 micro amps. The output data can sink 15 milli amps. The minimum high output is 3.65 volts.

GATED BUFFER

3-STATE

Vee ------- .. ----

	8TB
INPUT		OUTPUT
DATA	8212	DATA
(250 ~A)		(15mA)

(3.65V MIN)

"""' ------ C)ICLR

GATING {

CONTROL

(081-082) --- ...... -------- '

5-103