Intel 8080 manual I I, Logical Group, OCR M Decrement memory

OCR M (Decrement memory)

((H) (L)) .. - ((H) (L)) - 1

The content of the memory location whose address is contained in the Hand L registers is decremented by one. Note: All condition flags except CY are affected.

Cycles: 3

States: 10

Addressing: reg. indirect

Flags: Z,S,P,AC

INX rp (Increment register pair) (rh) (rl) .. - (rh) (rl) + 1

The content of the register pair rp is incremented by one. Note: No condition flags are affected.

Cycles: 1

States: 5

Addressing: register

Flags: none

OCX rp (Decrement register pair) (rh) (rl) .. - (rh) (rl) - 1

The content of the register pair rp is decremented by one. Note: No condition flags are affected.

I 0 I I 1

Cycles: 1

States: 5

Addressing: register

Flags: none

DAD rp (Add register pair to Hand L)

(H) (L) .. - (H) (L) + (rh) (rl)

The content of the register pair rp is added to the content of the register pair Hand L. The result is placed in the register pair Hand L. Note: Only the CY flag is affected. It is set if there is a carry out of the double precision add; otherwise it is reset.

Cycles: 3

States: 10

Addressing: register

Flags: CY

OAA (Decimal Adjust Accumulator)

The eight-bit number in the accumulator is adjusted to form two four-bit Binary-Coded-Decimal digits by the following process:

1. If the value of the least significant 4 bits of the accumulator is greater than 9 or if the AC flag is set, 6 is added to the accumulator.

2. If the value of the most significant 4 bits of the accumulator is now greater than 9, or if the CY flag is set, 6 is added to the most significant 4 bits of the accumulator.

NOTE: All flags are affected.

	o
Cycles:	1
States:	4
Flags:	Z,S,P,CY,AC

Logical Group:

This group of instructions performs logical (Boolean) operations on data in registers and memory and on condi- tion flags.

Unless indicated otherwise, all instructions in this group affect the Zero, Sign, Parity, Auxiliary Carry, and Carry flags according to the standard rules.

ANA r (AND Register)

(A) ~ (A) /\ (r)

The content of register r is logically anded with the content of the accumulator. The result is placed in the accumulator. The CY flag is cleared.

a Is I s S

Cycles: 1

States: 4

Addressing: register

Flags: Z,S,P,CY,AC

. ANA M (AND memory)

(A) ~ (A) /\ ((H) (L))

The contents of the memory location whose address is contained in the Hand L registers is logically anded with the content of the accumulator. The result is placed in the accumulator. The CY flag is cleared.

I 0 I 1 a a I 1 , 1 I a

Cycles: 2

States: 7

Addressing: reg. indirect

Flags: Z,S,P ,CY,AC

4-8