OCR M (Decrement memory)

((H) (L)) .. - ((H) (L)) - 1

The content of the memory location whose address is contained in the Hand L registers is decremented by one. Note: All condition flags except CY are affected.

Cycles: 3

States: 10

Addressing: reg. indirect

Flags: Z,S,P,AC

INX rp (Increment register pair) (rh) (rl) .. - (rh) (rl) + 1

The content of the register pair rp is incremented by one. Note: No condition flags are affected.

Cycles: 1

States: 5

Addressing: register

Flags: none

OCX rp (Decrement register pair) (rh) (rl) .. - (rh) (rl) - 1

The content of the register pair rp is decremented by one. Note: No condition flags are affected.

I 0 I I 1

Cycles: 1

States: 5

Addressing: register

Flags: none

DAD rp (Add register pair to Hand L)

(H) (L) .. - (H) (L) + (rh) (rl)

The content of the register pair rp is added to the content of the register pair Hand L. The result is placed in the register pair Hand L. Note: Only the CY flag is affected. It is set if there is a carry out of the double precision add; otherwise it is reset.

Cycles: 3

States: 10

Addressing: register

Flags: CY

OAA (Decimal Adjust Accumulator)

The eight-bit number in the accumulator is adjusted to form two four-bit Binary-Coded-Decimal digits by the following process:

1. If the value of the least significant 4 bits of the accumulator is greater than 9 or if the AC flag is set, 6 is added to the accumulator.

2. If the value of the most significant 4 bits of the accumulator is now greater than 9, or if the CY flag is set, 6 is added to the most significant 4 bits of the accumulator.

NOTE: All flags are affected.

 

o

Cycles:

1

States:

4

Flags:

Z,S,P,CY,AC

Logical Group:

This group of instructions performs logical (Boolean) operations on data in registers and memory and on condi- tion flags.

Unless indicated otherwise, all instructions in this group affect the Zero, Sign, Parity, Auxiliary Carry, and Carry flags according to the standard rules.

ANA r

(AND Register)

(A) ~ (A) /\ (r)

The content of register r is logically anded with the content of the accumulator. The result is placed in the accumulator. The CY flag is cleared.

a Is I s S

Cycles: 1

States: 4

Addressing: register

Flags: Z,S,P,CY,AC

. ANA M

(AND memory)

(A) ~ (A) /\ ((H) (L))

The contents of the memory location whose address is contained in the Hand L registers is logically anded with the content of the accumulator. The result is placed in the accumulator. The CY flag is cleared.

I 0 I 1 a a I 1 , 1 I a

Cycles: 2

States: 7

Addressing: reg. indirect

Flags: Z,S,P ,CY,AC

4-8

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Intel 8080 manual I I, Logical Group, OCR M Decrement memory, Cycles States Addressing reg. indirect Flags Z,S,P ,CY,AC
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8080 specifications

The Intel 8085 and 8080 microprocessors were groundbreaking innovations in the world of computing, paving the way for future microprocessor development and personal computing.

The Intel 8080, introduced in 1974, was an 8-bit microprocessor that played a fundamental role in the early days of personal computing. With a 16-bit address bus, it had the capability to address 64 KB of memory. Running at clock speeds of 2 MHz, the 8080 was notable for its instruction set, which included 78 instructions and 246 opcodes. It supported a range of addressing modes including direct, indirect, and register addressing. The 8080 was compatible with a variety of peripherals and played a crucial role in the development of many early computers.

The microprocessor's architecture was based on a simple and efficient design, making it accessible for hobbyists and engineers alike. It included an 8-bit accumulator, which allowed for data manipulation and storage during processing. Additionally, the 8080 featured registers like the program counter and stack pointer, which facilitated program flow control and data management. Its ability to handle interrupts also made it suitable for multitasking applications.

The Intel 8085, introduced in 1976, was an enhancement of the 8080 microprocessor. It maintained a similar architecture but included several key improvements. Notably, the 8085 had a built-in clock oscillator, simplifying system design by eliminating the need for external clock circuitry. It also featured a 5-bit control signal for status line management, which allowed for more flexible interfacing with peripheral devices. The 8085 was capable of running at speeds of up to 3 MHz and had an extended instruction set with 74 instructions.

One of the standout features of the 8085 was its support for 5 extra instructions for stack manipulation and I/O operations, which optimized the programming process. Additionally, it supported serial communication, making it suitable for interfacing with external devices. Its 16-bit address bus retained the 64 KB memory addressing capability of its predecessor.

Both the 8080 and 8085 microprocessors laid the groundwork for more advanced microprocessors in the years that followed. They demonstrated the potential of integrated circuits in computing and influenced the design and architecture of subsequent Intel microprocessors. Their legacy endures in the way they revolutionized computing, making technology accessible to a broader audience, and their influence is still felt in the design and architecture of modern microprocessors today.
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