SILICON GATE MOS 8259

8259 PRELIMINARY FUNCTIONAL DESCRIPTION

In microcomputer systems, the rate at which a peripheral device or devices can be serviced determines the total amount of system tasks that can be assigned to the control of the microprocessor. The higher the throughput the more jobs the microcomputer can do and the more cost effective it be- comes. Interrupts have long been accepted as a key to im- proving system throughput by servicing a peripheral device only when the device has requested it to do so. Efficient managing of the interrupt requests to the CPU will have a significant effect on the overall cost effectiveness of the microcomputer system.

The 8259 Programmable Interrupt Controller is a single-chip device that can manage eight levels of requests and has built- in features for expandability to other 8259s (up to 64 levels). It is programmed by the systems software as an I/O periphe- ral. A selection of priority algorithms is available to the pro- grammer so that the manner in which the requests are pro- cessed by the 8259 can be configured to match his system requirements. The priority assignments and algorithms can be changed or reconfigured dynamically at any time during the main program. This means that the oomplete interrupt structure can be defined as required, based on the total sys- tem environment.

The system interface is the same as other peripheral devices in the MC5-80. A special input is provided (SP) to program the 8259 as a slave or master device when expanding to more than eight levels. Basically the master accepts INT in- puts from the slaves and issues a composite request to the 8080A; when it receives the INTA from the 8228 it puts the first byte on the CALL on the bus. On subsequent INTAs the interrupting slave puts out the address of the vector.

ADDRESS BUS (16)

8259

IRQ IRQ IRQ IRQ IRQ IRQ IRQ IRQ

765 4 ~ 2 1 0

SLAVEI

PROG.

INTERRUPT

REQUESTS

8259 System Interface.

~

 

 

 

 

ADDR ESS BUS (16)

 

 

 

~

\

 

 

 

 

CONTROL BUS

 

 

 

\

 

 

 

 

 

 

 

 

 

 

INT REQ

\

 

 

 

 

DATA BUS (8)

 

 

 

\

.",-

 

 

 

to/'..

 

 

,t./'..

 

 

,t.

:lo

 

---

 

 

 

 

 

--- ---

---

 

I ----

 

 

 

 

--~ - 1 --

---

~ - -- I -

~

 

 

 

 

--I-- - I - - --

--- I --

I ----

 

 

 

 

~v'7

~V7 r--

 

~,7

"''...1''1

 

~v'7

"'v'7

 

(

 

 

 

 

 

 

 

 

 

 

 

 

""'

'"

 

 

 

8259

 

p.-

I --

8259

 

 

8259

 

 

 

SLAVE 1

 

'"

MASTER

 

 

SLAVE 2

 

p...t-

 

 

 

 

 

 

 

 

 

""'

'"

 

 

 

Sf

 

 

 

SP

 

 

 

 

 

 

 

 

 

SP

 

 

 

21 20 19

18 17

16

15 14

13 12

11 10 9 8 7 6

lJJ

5 4 3

2 1

0

G!O 1 fIll

f 11

G!O f f f fIlII

 

J 1111 ,

I

INTERRUPT REQUESTS

Cascading the 8259 22 Level Controller (Expandable to 64 levels).

5-174

Page 245 Page 247
Page 246
Image 246
Intel 8080 manual Ljj
Page 245 Page 247

8080 specifications

The Intel 8085 and 8080 microprocessors were groundbreaking innovations in the world of computing, paving the way for future microprocessor development and personal computing.

The Intel 8080, introduced in 1974, was an 8-bit microprocessor that played a fundamental role in the early days of personal computing. With a 16-bit address bus, it had the capability to address 64 KB of memory. Running at clock speeds of 2 MHz, the 8080 was notable for its instruction set, which included 78 instructions and 246 opcodes. It supported a range of addressing modes including direct, indirect, and register addressing. The 8080 was compatible with a variety of peripherals and played a crucial role in the development of many early computers.

The microprocessor's architecture was based on a simple and efficient design, making it accessible for hobbyists and engineers alike. It included an 8-bit accumulator, which allowed for data manipulation and storage during processing. Additionally, the 8080 featured registers like the program counter and stack pointer, which facilitated program flow control and data management. Its ability to handle interrupts also made it suitable for multitasking applications.

The Intel 8085, introduced in 1976, was an enhancement of the 8080 microprocessor. It maintained a similar architecture but included several key improvements. Notably, the 8085 had a built-in clock oscillator, simplifying system design by eliminating the need for external clock circuitry. It also featured a 5-bit control signal for status line management, which allowed for more flexible interfacing with peripheral devices. The 8085 was capable of running at speeds of up to 3 MHz and had an extended instruction set with 74 instructions.

One of the standout features of the 8085 was its support for 5 extra instructions for stack manipulation and I/O operations, which optimized the programming process. Additionally, it supported serial communication, making it suitable for interfacing with external devices. Its 16-bit address bus retained the 64 KB memory addressing capability of its predecessor.

Both the 8080 and 8085 microprocessors laid the groundwork for more advanced microprocessors in the years that followed. They demonstrated the potential of integrated circuits in computing and influenced the design and architecture of subsequent Intel microprocessors. Their legacy endures in the way they revolutionized computing, making technology accessible to a broader audience, and their influence is still felt in the design and architecture of modern microprocessors today.
Top Page Image Contents