Intel 8080 manual RWc 590 CD, Symbol Parameter Min Max

SILICON GATE MOS 81078·4

Read Modify Write Cycle£1]

Symbol		Parameter	Min.	Max.	Unit	Conditions
t	RWC	Read Modify Write( RMW)	590		ns	tT = 20ns
		Cycle Time
t CRW		CE Width During RMW	420	3000	ns
WC		WE to CE on	0		ns
t w		WE to CE off	150		ns	C load = 50pF, Load = One TTL Gate,
twp		WE Pulse Width	50		ns	Ref = 2.0V
tow		DIN to WE Set Up	0		ns
t OH		DIN Hold Time	0		ns
tco		CE to Output Delay		250	ns
t ACC		Access Time		270	ns	tACC = tAC + tco + ltT

'leH

ADDRESSES ANDes

~l

VIHC

CE

(Numbers in parentheses are for minimum cycle timing in ns.)

14 -------------------t RWc (590) CD -----------------.....I

	ADDRESS STABLE	ADDRESS CAN CHANGE	®
.--tAC(O)
~---	tAH(50)----	.f
~	-------------	t CRW (420) ---------------	~

----j---i-II------------------------------..l

®

1 .. ------- tw(150) --------- 1

"'H-------lI-P......------------...... 1

WE CAN

CHANGE

--. .-tow(O)

VIH ----+-.....----------~

DIN CAN CHANGE		DtN STABLE		DIN CAN
				CHANGE
Vil ----+-.....----------
		~
.. ---	tcO (250)	----- . 1		----- - --
VOH---- -		~-----------------	I
				--
D-O-U-TIMP~~G:NCE		----- VALlD --------	. 1	HIGH
				IMPEDANCE
VOl----!:.._ ~__	t Acc (270)	----- . 1	tCF(O)
~

NOTES:

1.A.C. characteristics are guaranteed only if cumulative CE on time during tREF is ~65% of tR EF. For continuous Read-Modify-Write operation, tcc and tRWC should be increased to at least 185ns and 645ns, respectively.

2.V'LMAX is the reference level for measuring timing of the aadresses, CS, WE, and DIN·

3.VI H MIN is the reference level for measuring timing of the addresses, CS, WE, and DIN·

4.VSS +2.QV is the reference level for measuring timing of CEo

5.VOO -2V is the reference level for measuring timing of CEo

6.VSS +2.QV is the reference level for measuring the timing of DOUT'

7.WE must be at VIH until end of tco.

8.During CE high typically a.5mA will be drawn from any address pin which is switched from low to high.

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