SUB M (Subtract memory)

(A) ~ (A) - ((H) (L))

The content of the memory location whose address is contained in the Hand L registers is subtracted from the content of the accumulator. The result is placed in the accumulator.

 

 

o

o

 

Cycles:

2

 

 

States:

7

 

 

Addressi ng:

reg. indirect

 

 

Flags:

Z,S,P,CY,AC

 

SUI data

(Subtract immediate)

 

(A) ~ (A) - (byte 2)

 

 

The content of the second byte of the instruction is subtracted from the content of the accumulator. The result is placed in the accumulator.

o

data

Cycles: 2

States: 7

Addressing: immediate

Flags: Z,S,P,CY,AC

SBB r (Subtract Register with borrow)

(A) ~ (A) - (r) - (CY)

The content of register r and the content of the CY flag are both subtracted from the accumulator. The result is placed in the accumulator.

1 I 0 I 0

S I S I S I

Cycles:

1

States:

4

Addressing:

register

Flags:

Z,S,P ,CY ,AC

SBa M (Subtract memory with borrow)

(A) ~ (A) - ((H) (L)) - (CY)

The content of the memory location whose address is

contained in the Hand L registers and the content of

the CY flag are both subtracted from the accumula-

tor. The result is placed in the accumulator.

1 I 0

,

1 I

1 I 1 I 0 I

0

 

 

Cycles:

2

 

 

States:

7

 

Addressing:

reg. indirect

 

 

Flags:

Z,S,P,CY,AC

SBI data (Subtract immediate with borrow)

(A) ~ (A) - (byte 2) - (CY)

The contents of the second byte of the instruction and the contents of the CY flag are both subtracted from the accumulator. The result is placed in the accumulator.

1 I

I 0

o

 

data

 

 

Cycles:

2

 

States:

7

 

Addressing:

immediate

 

Flags:

Z,S,P,CY,AC

INR r (Increment Register)

(r) ~ (r) + 1

The content of register r is incremented by one. Note: All condition flags except CY are affected.

D 1 r 0 I 0

Cycles: 1

States: 5

Addressi ng: register

Flags: Z,S,P,AC

INR M (Increment memory) ((H) (L)) ~ ((H) (L)) + 1

The content of the memory location whose address is contained in the Hand L registers is incremented by one. Note: All condition flags except CY are affected.

o I 0

o

o

o

Cycles: 3

States: 10

Addressing: reg. indirect

Flags: Z,S,P,AC

OCR r(Decrement Register)

(r) ~ (r)-1

The content of register r is decremented by one. Note: All condition flag~ except CY are affected.

0 I 0 I D I D

D I 1 I 0

I 1

Cycles:

1

.f'

States:

5

 

Addressing:

register

 

Flags:

Z,S,P,AC

 

4-7

Page 50 Page 52
Page 51
Image 51
Intel 8080 manual R 0 I, I D I D
Page 50 Page 52

8080 specifications

The Intel 8085 and 8080 microprocessors were groundbreaking innovations in the world of computing, paving the way for future microprocessor development and personal computing.

The Intel 8080, introduced in 1974, was an 8-bit microprocessor that played a fundamental role in the early days of personal computing. With a 16-bit address bus, it had the capability to address 64 KB of memory. Running at clock speeds of 2 MHz, the 8080 was notable for its instruction set, which included 78 instructions and 246 opcodes. It supported a range of addressing modes including direct, indirect, and register addressing. The 8080 was compatible with a variety of peripherals and played a crucial role in the development of many early computers.

The microprocessor's architecture was based on a simple and efficient design, making it accessible for hobbyists and engineers alike. It included an 8-bit accumulator, which allowed for data manipulation and storage during processing. Additionally, the 8080 featured registers like the program counter and stack pointer, which facilitated program flow control and data management. Its ability to handle interrupts also made it suitable for multitasking applications.

The Intel 8085, introduced in 1976, was an enhancement of the 8080 microprocessor. It maintained a similar architecture but included several key improvements. Notably, the 8085 had a built-in clock oscillator, simplifying system design by eliminating the need for external clock circuitry. It also featured a 5-bit control signal for status line management, which allowed for more flexible interfacing with peripheral devices. The 8085 was capable of running at speeds of up to 3 MHz and had an extended instruction set with 74 instructions.

One of the standout features of the 8085 was its support for 5 extra instructions for stack manipulation and I/O operations, which optimized the programming process. Additionally, it supported serial communication, making it suitable for interfacing with external devices. Its 16-bit address bus retained the 64 KB memory addressing capability of its predecessor.

Both the 8080 and 8085 microprocessors laid the groundwork for more advanced microprocessors in the years that followed. They demonstrated the potential of integrated circuits in computing and influenced the design and architecture of subsequent Intel microprocessors. Their legacy endures in the way they revolutionized computing, making technology accessible to a broader audience, and their influence is still felt in the design and architecture of modern microprocessors today.
Top Page Image Contents