General, ReadlWrite Control logic, Reset Reset

SILICON GATE MOS 8251

8251 BASIC FUNCTIONAL DESCRIPTION

General

The 8251 is a Universal Synchronous!Asynchronous Re- ceiver/Transmitter designed specifically for the 8080 Micro- computer System. like other I!O devices in the 8080 Micro- computer System its functional configuration is programmed by the systems software for maximum flexibility. The 8251 can support virtually any serial data technique currently in use (including IBM "bi-sync").

In a communication environment an interface device must convert parallel format system data into serial format for transmission and convert incoming serial format data into parallel system data for reception. The interface device must also delete or insert bits or characters that are functionally unique to the communication technique. In essence, the interface should appear "transparent" to the CPU, a simple input or output of byte-oriented system data.

Data Bus Buffer

This 3-state, bi-directional,8-bit buffer is used to interface the 8251 to the 8080 system Data Bus. Data is transmitted or received by the buffer upon execution of INput or OUT- put instructions of the 8080 CPU. Control words, Command words and Status information are also transferred through the Data Bus Buffer.

ReadlWrite Control logic

This functional block accepts inputs from the 8080 Control bus and generates control signals for overall device operation. It contains the Control Word Register and Command Word Register that store the various control formats for device functional definition.

RESET (Reset)

A "high" on this input forces the 8251 into an "Idie" mode. The device will remain at "Idle" until a new set of control words is written into the 8251 to program its functional definition.

ClK (Clock)

The ClK input is used to generate internal device timing and is normally connected to the Phase 2 (TTL) output of the 8224 Clock Generator. No external inputs or outputs are referenced to ClK but the frequency of ClK must be greater than 30 times the Receiver or Transmitter clock in- puts for synchronous mode (4.5 times for asynchronous mode).

WR (Write)

A "Iow" on this input informs the 8251 that the CPU is outputting data or control words, in essence, the CPU is writi ng out to the 8251.

RD (Read)

A "Iow" on this input informs the 8251 that the CPU is in- putting data or status information, in essence, the CPU is reading from the 8251.

C/D (Control/Data)

This input, in conjunction with the WR and RD inputs in- forms the 8251 that the word on the Data Bus is either a data character, control word or status information.

1 = CONTROL 0 = DATA

CS (Chip Select)

A "low" on this input enables the 8251. No read ing or writ- ing will occur unless the device is selected.

c/o	RD	WR	CS
o	0	1	0	8251 => DATA BUS
o	1	0	0	DATA BUS => 8251
1	0	1	0	STATUS=> DATA BUS
1	1	0	0	DATA BUS=> CONTROL
X	X	X	1	DATA BUS=> 3-STATE

5-136

8080 specifications

The Intel 8085 and 8080 microprocessors were groundbreaking innovations in the world of computing, paving the way for future microprocessor development and personal computing.

The Intel 8080, introduced in 1974, was an 8-bit microprocessor that played a fundamental role in the early days of personal computing. With a 16-bit address bus, it had the capability to address 64 KB of memory. Running at clock speeds of 2 MHz, the 8080 was notable for its instruction set, which included 78 instructions and 246 opcodes. It supported a range of addressing modes including direct, indirect, and register addressing. The 8080 was compatible with a variety of peripherals and played a crucial role in the development of many early computers.

The microprocessor's architecture was based on a simple and efficient design, making it accessible for hobbyists and engineers alike. It included an 8-bit accumulator, which allowed for data manipulation and storage during processing. Additionally, the 8080 featured registers like the program counter and stack pointer, which facilitated program flow control and data management. Its ability to handle interrupts also made it suitable for multitasking applications.

The Intel 8085, introduced in 1976, was an enhancement of the 8080 microprocessor. It maintained a similar architecture but included several key improvements. Notably, the 8085 had a built-in clock oscillator, simplifying system design by eliminating the need for external clock circuitry. It also featured a 5-bit control signal for status line management, which allowed for more flexible interfacing with peripheral devices. The 8085 was capable of running at speeds of up to 3 MHz and had an extended instruction set with 74 instructions.

One of the standout features of the 8085 was its support for 5 extra instructions for stack manipulation and I/O operations, which optimized the programming process. Additionally, it supported serial communication, making it suitable for interfacing with external devices. Its 16-bit address bus retained the 64 KB memory addressing capability of its predecessor.

Both the 8080 and 8085 microprocessors laid the groundwork for more advanced microprocessors in the years that followed. They demonstrated the potential of integrated circuits in computing and influenced the design and architecture of subsequent Intel microprocessors. Their legacy endures in the way they revolutionized computing, making technology accessible to a broader audience, and their influence is still felt in the design and architecture of modern microprocessors today.

Intel 8080 manual General, ReadlWrite Control logic, Reset Reset, ClK Clock, WR Write, RD Read

Models: 8080