Command Instruction Definition, Status Read Definition

SILICON GATE MOS 8251

COMMAND INSTRUCTION DEFINITION

Once the functional definition of the 8251 has been pro- grammed by the Mode Instruction and the Sync Characters are loaded (if in· Sync Mode) then the device is ready to be used for data communication. The Command Instruction controls the actual operation of the selected format. Func- tions such as: Enable Transmit/Receive, Error Reset and Modem Controls are provided by the Command Instruction.

Once the Mode Instruction has been written into the 8251 and Sync characters inserted, if necessary, then all further "control writes" (C/O = 1) will load the Command In- struction. A Reset operation (internal or external) will return the 8251 to the Mode Instruction Format.

		TRANSMIT ENABLE
		1 = enable
		0= disable
		DATA TERMINAL
	~ READY
		"high" will force DTR
		output to zero
		RECEIVE ENABLE
	'------~ 1 = enable
		0= disable
		SEND BREAK
		CHARACTER
		1 = forces TxD "Iow"
		o = normal operation
		ERROR RESET
	----------- .. 1 = reset all error flags
		PE, OE, FE
		REQUEST TO SEND
L . --	-- ..	"high" will force RTS
		output to zero
		INTERNAL RESET
L . --	.......	"high" returns 8251 to
		Mode Instruction Format
		ENTER HUNT MODE
L . --	-- ..	1 = enable search for Sync

Characters

Command Instruction Format

STATUS READ DEFINITION

In data communication systems it is often necessary to examine the "status" of the active device to ascertain if errors have occu rred or other cond itions that requ ire the processor's attention. The 8251 has facilities that allow the programmer to "read" the status of the device at any time du ring the fu nctional operation.

A normal "read" command is issued by the CPU with the C/O input at one to accomplish this function.

Some of the bits in the Status Read Format have identical meanings to external output pins so that the 8251 can be used in a completely Polled environment or in an interrupt driven environment.

SAME DEFINITIONS AS I/O PINS

PARITY ERROR

The PE flag is set when a parity error is detected. It is reset by the ER bit of the Command Instruction. PE does not inhibit operation of the 8251.

OVERRUN ERROR

The OE flag is set when the CPU does not read a character before the next one becomes available. It is reset by the ER bit of the Command Instruction. OE does not inhibit operation of the 8251 ; however, the previously overrun character is lost.

FRAMING ERROR (Async only) The FE flag is set when a valid Stop bit is not detected at the end of every character. It is reset by the ER bit of the Command Instruction. FE does not inhibit the operation of the 8251.

Status Read Format

5-142

8080 specifications

The Intel 8085 and 8080 microprocessors were groundbreaking innovations in the world of computing, paving the way for future microprocessor development and personal computing.

The Intel 8080, introduced in 1974, was an 8-bit microprocessor that played a fundamental role in the early days of personal computing. With a 16-bit address bus, it had the capability to address 64 KB of memory. Running at clock speeds of 2 MHz, the 8080 was notable for its instruction set, which included 78 instructions and 246 opcodes. It supported a range of addressing modes including direct, indirect, and register addressing. The 8080 was compatible with a variety of peripherals and played a crucial role in the development of many early computers.

The microprocessor's architecture was based on a simple and efficient design, making it accessible for hobbyists and engineers alike. It included an 8-bit accumulator, which allowed for data manipulation and storage during processing. Additionally, the 8080 featured registers like the program counter and stack pointer, which facilitated program flow control and data management. Its ability to handle interrupts also made it suitable for multitasking applications.

The Intel 8085, introduced in 1976, was an enhancement of the 8080 microprocessor. It maintained a similar architecture but included several key improvements. Notably, the 8085 had a built-in clock oscillator, simplifying system design by eliminating the need for external clock circuitry. It also featured a 5-bit control signal for status line management, which allowed for more flexible interfacing with peripheral devices. The 8085 was capable of running at speeds of up to 3 MHz and had an extended instruction set with 74 instructions.

One of the standout features of the 8085 was its support for 5 extra instructions for stack manipulation and I/O operations, which optimized the programming process. Additionally, it supported serial communication, making it suitable for interfacing with external devices. Its 16-bit address bus retained the 64 KB memory addressing capability of its predecessor.

Both the 8080 and 8085 microprocessors laid the groundwork for more advanced microprocessors in the years that followed. They demonstrated the potential of integrated circuits in computing and influenced the design and architecture of subsequent Intel microprocessors. Their legacy endures in the way they revolutionized computing, making technology accessible to a broader audience, and their influence is still felt in the design and architecture of modern microprocessors today.

Intel 8080 Command Instruction Definition, Status Read Definition, Command Instruction Format

Models: 8080