Motorola MVME187 manual Nvram

Index

I

N D E X

SCSI commands Inquiry 4-14 Mode Sense 4-14

sector size 4-14selftest error 4-12

sequential access device B-2,B-3Serial Controller Chip (SCC)

see also CD2401 serial port 1 5-8serial port 2 5-8

serial port 4 clock configuration select headers J7 and J8 3-11

serial port interface 2-18serial ports 2-3

Set Environment to Bug/Operating Sys- tem (ENV) A-3

settings for

J1 general purpose readable jumpers

3-9

J2 system controller header 3-10

J6 SRAM optional backup power se- lect header 3-12

J7 and J8 serial port 4 clock configu- ration select headers 3-13

setup/operation parameters default

in NVRAM 3-9

SFU (special function unit) 5-11,5-14shared RAM 4-21

shielded cables 3-17sign field 5-12signal

adaptations E-4 ground E-7 levels E-1

name conventions 1-2

edge significant 1-2 level significant 1-2

Single Board Computer (SBC)

see also RISC Single Board Computer single precision real 5-13

small-endian byte ordering 1-3software-programmable hardware inter-

rupts 2-23

source line 5-8

special function unit (SFU) 5-11specifications 2-6

square brackets 5-3 SRAM (static RAM) 2-13

SRAM backup power source select head- er J6 3-11,3-12

S-record format 5-8 stacking mezzanines 2-16 standards requirements 2-6 startup procedure overview 3-2 static RAM (SRAM) 2-13 static variable space 4-5 status bit 1-4

status codes (MPCR) 4-22

storage and the real-time clock 3-29streaming tape drive B-4

see also QIC-2 streaming tape drive string literal 5-5

supervisor address space 5-6supported controllers 4-13 switches 2-11

syntactic variables 5-4

SYSFAIL* assertion/negation 4-12 system

considerations 3-27console 3-21,D-1controller 3-10controller function 3-14 controller header 3-10 controller header J2 3-8 fail (SYSFAIL*) 4-7reset 4-10

startup overview 3-24 system calls

see also disk I/O via 187Bug system calls

system calls <singlepage> 4-16

IN-16