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Motorola MVME187 manual Contents

Models: MVME187

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Contents

This Chapter Covers 1-1About this Manual 1-1

Terminology, Conventions, and DeÞnitions Used in this Manual 1-2 Data and Address Parameter Numeric Formats 1-2

Signal Name Conventions 1-2

Assertion and Negation Conventions 1-3Data and Address Size DeÞnitions 1-3Big-Endian Byte Ordering 1-3

Control and Status Bit DeÞnitions 1-4

True/False Bit State DeÞnitions 1-4Bit Value Descriptions 1-4

Related Documentation 1-5

Document Set for MVME187-0xxBoard 1-5 Additional Manuals for this Board 1-6Other Applicable Motorola Publications 1-6

Non-Motorola Peripheral Controllers Publications Bundle 1-7 Applicable Non-Motorola Publications 1-9

This Chapter Covers 2-1

General Description 2-1

Onboard Memory Mezzanine Module 2-2SCSI Mass Storage Interface 2-2

Serial Ports 2-3

Parallel (Printer) Port 2-3Ethernet Transceiver Interface 2-3187Bug Firmware 2-4

Features 2-4SpeciÞcations 2-6

Conformance to Requirements 2-6Board Level Overview 2-7

Connectors 2-7

Adapters 2-7 Transition Modules 2-8 ASICs 2-8

VMEchip2 ASIC 2-9

PCCchip2 ASIC 2-9

MEMC040 Memory Controller ASIC 2-10

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Motorola MVME187 manual Contents

Contents

MVME187IG/D4 MVME187 RISC Single Board Computer Installation GuideRestricted Rights Legend Preface Dangerous Procedure Warnings Safety Summary Safety Depends On YouDo Not Service or Adjust Alone Use Caution When Exposing or Handling the CRTThis equipment generates, uses, and can radiate electro Page Contents Battery Backed Up RAM and Clock VMEbus Interface I/O Interfaces Front Panel Switches and LEDs Data Bus StructureLocal Bus Arbitration M88000 MPU EPROM Programmable EPROM Features Static RAM Optional SRAM Battery Backup Onboard DRAMPowering Up the System 3-25 Initializing the Real-Time Clock Jumper Settings Optional Jumper SettingsInstalling the Hardware Installing the MVME187 in the Chassis Completing the Installation 3-24 Starting the SystemBO Bootstrap Operating System 4-15 BH Bootstrap and Halt Booting and Restarting 187Bug 4-5 Starting Up 187Bug 4-6 AutobootAutoboot Sequence 4-6 ROMboot ROMboot Sequence 4-7 Network Boot Network Boot Sequence 4-8 Restarting the System Reset Abort BreakMPCR Status Codes Multiprocessor Address Register MPAR 4-22 MPCR Powerup Sequence187Bug Diagnostic Test Groups 4-27 This Chapter Covers The 187Bug Debugger Command Set 5-15 This Appendix Covers A-1Signal Adaptations E-4 Sample ConÞgurations E-4 Proper Grounding E-7 Typical Transition Module Peripheral Port Connectors List of FiguresMVME187 General Block Diagram Using MVME712A/AM and MVME712BList of Tables This Chapter Covers 1Introduction to the MVME187 Installation GuideAbout this Manual Terminology, Conventions, and Deﬁnitions Used in this Manual Signal Name ConventionsData and Address Parameter Numeric Formats Data and Address Size Deﬁnitions Assertion and Negation ConventionsBig-Endian Byte Ordering The bit can be set and cleared under software Control and Status Bit DeﬁnitionsTrue/False Bit State Deﬁnitions Bit Value DescriptionsDocument Set for MVME187-0xx Board Related DocumentationOther Applicable Motorola Publications Additional Manuals for this BoardAlso available but not included in the set Non-Motorola Peripheral Controllers Publications Bundle Part Number Introduction to the MVME187 Installation GuideData Sheet MC68230 Parallel Interface Timer PI/T Data SheetSheet, order number Applicable Non-Motorola PublicationsANSI/IEEE Std Data, IEC 821 BUS1-10 Introduction to the MVME187 Installation GuideGeneral Description Board Level Hardware DescriptionThis Chapter Covers SCSI Mass Storage Interface Onboard Memory Mezzanine ModuleParallel Printer Port Serial PortsEthernet Transceiver Interface 187Bug Firmware FeaturesFour 32-bit tick timers for periodic interrupts Watchdog timer Conformance to Requirements SpeciﬁcationsTable 2-1. MVME187 General Speciﬁcations Adapters ConnectorsFigure 2-1. MVME187 General Block Diagram Board Level OverviewASICs Transition ModulesTable 2-2. Bus Transfers VMEchip2 ASICPCCchip2 ASIC MEMC040 Memory Controller ASIC Functional DescriptionMCECC Memory Controller ASIC Table 2-3. Front Panel Switches Front Panel Switches and LEDsTable 2-4. Front Panel LEDs M88000 MPU Data Bus StructureLocal Bus Arbitration EPROM Programmable EPROM FeaturesStatic RAM Optional SRAM Battery Backup Onboard DRAM DRAM Programming Considerations Stacking MezzaninesBattery Backed Up RAM and Clock I/O Interfaces VMEbus InterfaceSerial Port Interface Serial Interface Programming Considerations Parallel Port Interface Ethernet Interface SCSI Interface Buffer OverrunsSCSI Termination Local Resources Programmable Tick TimersWatchdog Timer Local Bus TimeoutLocal Bus Memory Map Memory MapsNormal Address Range Devices Table 2-5. Local Bus Memory Map Table 2-6. Local I/O Devices Memory Map Table 2-6. Local I/O Devices Memory Map Continued VMEbus Memory Map VMEbus Accesses to the Local BusVMEbus Short I/O Memory Map Unpacking the Equipment Hardware Preparation and InstallationThis Chapter Covers Table 3-1. Startup Overview Overview of Startup ProcedureUserÕs Manual Table 3-1. Startup Overview Continuedobtain the Single Board Computer SCSI Softwarepage Table 3-1. Startup Overview Continuedobtain the Debugging Preparing the Hardware Modifying Conﬁguration before InstallationOption Modiﬁcation MVME Figure 3-1. MVME187 Switches, Headers, Connectors, Fuses, and LEDsEPROM Orientation Jumper SettingsChecking the 187Bug EPROMs EPROM LocationGeneral Purpose Software Readable Header J1 Optional Jumper SettingsReserved/DeÞned Bits GPI4 - GPI7 Table 3-3. Factory Settings for J1 General Purpose Readable JumpersTable 3-2. J1 Bit Descriptions GPI0 - GPI3System Controller Header J2 Table 3-4. Settings for J2 System Controller HeaderSystem Serial Port 4 Clock Conﬁguration Select Headers J7 and J8 Optional SRAM Backup Power Source Select Header J6Select Header Table 3-5. Settings for Optional J6 SRAM Backup Power Sourceclock Table 3-6. Settings for J7 and J8 Serial Port 4 Clock ConﬁgurationSelect Headers Serial PortTable 3-7. MVME187 Preparation Procedure Preparing the MVME187 for InstallationPreparing the System Chassis Table 3-8. Chassis Preparation/Slot Selection ProcedureInstalling the MVME187 in the Chassis Installing the HardwareTable 3-9. MVME187 Installation Procedure Installing the Hardware Transition Modules and Adapter Boards Overview3-17 Hardware Preparation and Installation Figure 3-2. Typical Internal SCSI and Serial Port Connections3-18 External SCSI drives Equipment ConnectionsTable 3-10. Peripheral Connections Some connection diagrams are in the Single Board ComputerConnecting Peripherals Installing Transition Modules and Adapter BoardsTable 3-11. Transition Module and Adapter Board Installation Overview powerup Table 3-12. Peripheral Connection Proceduresparity disabled no parity baud rate 9600 baud default baud rate of MVME187 ports atFigure 3-3. Using MVME712A/AM and MVME712B To J10 on Figure 3-4. Typical Transition Module Peripheral Port ConnectorsMVME 712ATable 3-14. System Startup Overview Completing the InstallationTable 3-13. Installation Completion Procedure Starting the SystemIf 187Bug is in Powering Up the SystemInitializing the Real-Time Clock Examining and/or Changing Environmental Parameters187-BugSET 0522961037 Return Table 3-15. RTC Initialization ProcedureProgramming the PCCchip2 and VMEchip2 SET MMddyyhhmm+/-CALCMemory Address Ranges Backplane Power ConnectionsGlobal Bus Timeout System ConsiderationsGCSR Location Monitor Register Multiple Module Cage ConﬁgurationEthernet LAN +12 Vdc Fuse Storage and the Real-Time Clock SCSI Bus Termination187-Bugps Return 3-30 Hardware Preparation and InstallationThis Chapter Covers Debugger General InformationIntroduction to MVME187Bug Overview of M88000 FirmwareDescription of 187Bug Command FacilitiesTrap #496 Routines Keyboard Control Debugger or Diagnostic Directories187Bug Implementation Comparison with M68000-Based FirmwareMemory Requirements Booting and Restarting 187BugAutoboot Sequence AutobootStarting Up 187Bug ROMboot Sequence ROMbootNetwork Boot Sequence Network BootRestarting the System Abort ResetDuring COLD reset During WARM resetBreak Abort SequenceSYSFAIL* Assertion/Negation Break SequenceMPU Clock Speed Calculation Supported Controllers Disk I/O SupportDisk Support Facilities Parameter TablesDevice Probe Function Blocks Versus SectorsIOP Physical I/O to Disk Disk I/O via 187Bug CommandsBO Bootstrap Operating System IOI Input/Output InquiryController Command Packets BH Bootstrap and HaltDisk I/O via 187Bug System Calls Default 187Bug Controller and Device Parameters source Disk I/O Error CodesIntel 82596 LAN Coprocessor Ethernet Driver Network I/O SupportUDP/IP Protocol Modules TFTP Protocol Module BOOTP Protocol ModuleNetwork Boot Control Module RARP/ARP Protocol ModulesMultiprocessor Support Network I/O Error CodesMultiprocessor Control Register MPCR Method MPCR Status Codes MPCR Powerup SequenceMultiprocessor Address Register MPAR 3. As the initialization proceeds, the execution path comes to the prompt routine Global Control and Status Register GCSR Method Table 4-1. Diagnostic Monitor Commands/Preﬁxes Diagnostic FacilitiesCommand Table 4-2. Diagnostic UtilitiesTable 4-1. Diagnostic Monitor Commands/Preﬁxes CommandTable 4-3. Diagnostic Test Groups 187Bug Diagnostic Test Groups4-28 Debugger General InformationThis Chapter Covers Using the 187Bug DebuggerEntering Debugger Command Lines Terminal Input/Output ControlUsing the 187Bug Debugger Debugger Command Syntax Expression as a Parameter Syntactic VariablesAddress as a Parameter Address Formats Offset Registers Port NumbersCreating a Program with the Assembler/Disassembler Entering and Debugging ProgramsDownloading an S-Record Object File Read the Program from Disk Calling System Utilities from User Programs187Bug Vector Table and Workspace Preserving the Debugger Operating EnvironmentCPU/MPU Registers Floating Point SupportHardware Functions Exception Vectors Used by 187Bug1. The sign field is the first field and is a binary field 3 hex digits. Bias = $3FF Single Precision RealDouble Precision Real 2 hex digits. Bias = $7FScientiﬁc Notation BC range del addr B H W The 187Bug Debugger Command SetTable 5-1. Debugger Commands AS addrDS addr count del addr Table 5-1. Debugger Commands ContinuedHE command DMA range del addr del vdir del am del blkMAR controller LUN del device LUN Table 5-1. Debugger Commands ContinuedMAW controller LUN del device LUN del block #SET mmddyyhhmm n C Table 5-1. Debugger Commands ContinuedSYMS symbol-name S RS reg del exp del addr S DThis Appendix Covers AConﬁgure and Environment CommandsConﬁguring the Board Information Block Page ENV D Setting Environment to Bug/Operating SystemThe parameters to be configured are listed in the following table Table A-1. ENV Command ParametersFFBFFFFC Table A-1. ENV Command Parameters ContinuedTable A-1. ENV Command Parameters Continued Table A-1. ENV Command Parameters Continued FFFFCE0F Table A-1. ENV Command Parameters Continued01FFFFFF Table A-1. ENV Command Parameters ContinuedFFE1FFFF Table A-1. ENV Command Parameters ContinuedGuide 01FFEFFFFFFF Table A-1. ENV Command Parameters ContinuedTable A-1. ENV Command Parameters Continued Table A-1. ENV Command Parameters Continued A-14 Configure and Environment CommandsDisk/Tape Controller Modules Supported BDisk/Tape Controller Data$XXXXXXXX Disk/Tape Controller Default ConﬁgurationsMVME328 -- 14 Devices MVME327A -- 9 DevicesMVME350 -- 1 Device IOT Command Parameters for Supported Floppy TypesDSDD5 Other CharacteristicsIOT Parameter Floppy Types and FormatsDisk/Tape Controller Data CNetwork Controller Data Table C-1. Network Controller Access DataNetwork Controller Modules Supported Table C-1. Network Controller Access Data Continued Table D-1. Troubleshooting Steps DTroubleshooting the MVME187 Solving Startup ProblemsTable D-1. Troubleshooting Steps Continued III. Debug Table D-1. Troubleshooting Steps ContinuedBREAK Table D-1. Troubleshooting Steps Continued3. When prompted to Update Non-Volatile RAM, type in 187-DiagTable D-1. Troubleshooting Steps Continued Troubleshooting the MVME187 Solving Startup Problems Introduction EEIA-232-D InterconnectionsGrounding Table E-1. EIA-232-D InterconnectionsTable E-1. EIA-232-D Interconnections Continued Levels of ImplementationSample Conﬁgurations Signal AdaptationsFigure E-1. Middle-of-the-Road EIA-232-D Conﬁguration Figure E-2. Minimum EIA-232-D Connection Proper Grounding EIA-232-D Interconnections Index SymbolsNumerics I N D E I N D E error codessupport via 187Bug commands 4-15 via 187Bug system calls default configurations B-2I N D E I N D E local bus local I/O devices 2-26 VMEbus 2-28 VMEbus short I/OI N D E see also CD2401 scientific notation 5-14 SCON LED I N D Esee also CD2401 serial port 1 5-8 serial port 2 in NVRAMedge significant 1-2 level significant I N D EI N D E