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Motorola MVME187 manual 187Bug Diagnostic Test Groups, 3. Diagnostic Test Groups

Models: MVME187

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Diagnostic Facilities

187Bug Diagnostic Test Groups

Refer to the MVME187Bug Debugging Package User's Manual for complete descriptions of the diagnostic routines available and instructions on how to invoke them. Note that some diagnostics depend on restart defaults that are set up only in a particular restart mode. Refer to the documentation on a particular diagnostic for the correct mode.

	Table 4-3. Diagnostic Test Groups

Test Set		Description

RAM		Local RAM Tests

SRAM		Static RAM Tests

RTC		MK48T0x Real-Time Clock Tests

PCC2		Peripheral Channel Controller Tests

MCECC		Memory Board Tests

MEMC1		MC040 Memory Controller 1 ASIC Tests

MEMC2		MC040 Memory Controller 2 ASIC Tests

ST2401		CD2401 Serial Port Tests

CMMU		Memory Management Unit Tests

VME2		VME Interface ASIC VMEchip2 Tests

LAN		LAN Coprocessor (Intel 82596) Tests

NCR		NCR 53C710 SCSI I/O Processor Tests

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Motorola MVME187 manual 187Bug Diagnostic Test Groups, 3. Diagnostic Test Groups

Contents

MVME187IG/D4 MVME187 RISC Single Board Computer Installation GuideRestricted Rights Legend Preface Do Not Service or Adjust Alone Safety Summary Safety Depends On YouUse Caution When Exposing or Handling the CRT Dangerous Procedure WarningsThis equipment generates, uses, and can radiate electro Page Contents Local Bus Arbitration M88000 MPU EPROM Programmable EPROM Features Front Panel Switches and LEDs Data Bus StructureStatic RAM Optional SRAM Battery Backup Onboard DRAM Battery Backed Up RAM and Clock VMEbus Interface I/O InterfacesInstalling the Hardware Installing the MVME187 in the Chassis Jumper Settings Optional Jumper SettingsCompleting the Installation 3-24 Starting the System Powering Up the System 3-25 Initializing the Real-Time ClockAutoboot Sequence 4-6 ROMboot ROMboot Sequence 4-7 Network Boot Booting and Restarting 187Bug 4-5 Starting Up 187Bug 4-6 AutobootNetwork Boot Sequence 4-8 Restarting the System Reset Abort Break BO Bootstrap Operating System 4-15 BH Bootstrap and Halt187Bug Diagnostic Test Groups 4-27 This Chapter Covers Multiprocessor Address Register MPAR 4-22 MPCR Powerup SequenceThe 187Bug Debugger Command Set 5-15 This Appendix Covers A-1 MPCR Status CodesSignal Adaptations E-4 Sample ConÞgurations E-4 Proper Grounding E-7 MVME187 General Block Diagram List of FiguresUsing MVME712A/AM and MVME712B Typical Transition Module Peripheral Port ConnectorsList of Tables This Chapter Covers 1Introduction to the MVME187 Installation GuideAbout this Manual Terminology, Conventions, and Deﬁnitions Used in this Manual Signal Name ConventionsData and Address Parameter Numeric Formats Data and Address Size Deﬁnitions Assertion and Negation ConventionsBig-Endian Byte Ordering True/False Bit State Deﬁnitions Control and Status Bit DeﬁnitionsBit Value Descriptions The bit can be set and cleared under softwareDocument Set for MVME187-0xx Board Related DocumentationOther Applicable Motorola Publications Additional Manuals for this BoardAlso available but not included in the set Non-Motorola Peripheral Controllers Publications Bundle Data Sheet Introduction to the MVME187 Installation GuideMC68230 Parallel Interface Timer PI/T Data Sheet Part NumberANSI/IEEE Std Applicable Non-Motorola PublicationsData, IEC 821 BUS Sheet, order number1-10 Introduction to the MVME187 Installation GuideGeneral Description Board Level Hardware DescriptionThis Chapter Covers SCSI Mass Storage Interface Onboard Memory Mezzanine ModuleParallel Printer Port Serial PortsEthernet Transceiver Interface 187Bug Firmware FeaturesFour 32-bit tick timers for periodic interrupts Watchdog timer Conformance to Requirements SpeciﬁcationsTable 2-1. MVME187 General Speciﬁcations Figure 2-1. MVME187 General Block Diagram ConnectorsBoard Level Overview AdaptersASICs Transition ModulesTable 2-2. Bus Transfers VMEchip2 ASICPCCchip2 ASIC MEMC040 Memory Controller ASIC Functional DescriptionMCECC Memory Controller ASIC Table 2-3. Front Panel Switches Front Panel Switches and LEDsTable 2-4. Front Panel LEDs M88000 MPU Data Bus StructureLocal Bus Arbitration EPROM Programmable EPROM FeaturesStatic RAM Optional SRAM Battery Backup Onboard DRAM DRAM Programming Considerations Stacking MezzaninesBattery Backed Up RAM and Clock I/O Interfaces VMEbus InterfaceSerial Port Interface Serial Interface Programming Considerations Parallel Port Interface Ethernet Interface SCSI Interface Buffer OverrunsSCSI Termination Watchdog Timer Programmable Tick TimersLocal Bus Timeout Local ResourcesLocal Bus Memory Map Memory MapsNormal Address Range Devices Table 2-5. Local Bus Memory Map Table 2-6. Local I/O Devices Memory Map Table 2-6. Local I/O Devices Memory Map Continued VMEbus Memory Map VMEbus Accesses to the Local BusVMEbus Short I/O Memory Map Unpacking the Equipment Hardware Preparation and InstallationThis Chapter Covers Table 3-1. Startup Overview Overview of Startup Procedureobtain the Single Board Table 3-1. Startup Overview ContinuedComputer SCSI Software UserÕs Manualpage Table 3-1. Startup Overview Continuedobtain the Debugging Preparing the Hardware Modifying Conﬁguration before InstallationOption Modiﬁcation MVME Figure 3-1. MVME187 Switches, Headers, Connectors, Fuses, and LEDsChecking the 187Bug EPROMs Jumper SettingsEPROM Location EPROM OrientationGeneral Purpose Software Readable Header J1 Optional Jumper SettingsReserved/DeÞned Bits Table 3-2. J1 Bit Descriptions Table 3-3. Factory Settings for J1 General Purpose Readable JumpersGPI0 - GPI3 GPI4 - GPI7System Controller Header J2 Table 3-4. Settings for J2 System Controller HeaderSystem Serial Port 4 Clock Conﬁguration Select Headers J7 and J8 Optional SRAM Backup Power Source Select Header J6Select Header Table 3-5. Settings for Optional J6 SRAM Backup Power SourceSelect Headers Table 3-6. Settings for J7 and J8 Serial Port 4 Clock ConﬁgurationSerial Port clockTable 3-7. MVME187 Preparation Procedure Preparing the MVME187 for InstallationPreparing the System Chassis Table 3-8. Chassis Preparation/Slot Selection ProcedureInstalling the MVME187 in the Chassis Installing the HardwareTable 3-9. MVME187 Installation Procedure Installing the Hardware Transition Modules and Adapter Boards Overview3-17 Hardware Preparation and Installation Figure 3-2. Typical Internal SCSI and Serial Port Connections3-18 Table 3-10. Peripheral Connections Equipment ConnectionsSome connection diagrams are in the Single Board Computer External SCSI drivesConnecting Peripherals Installing Transition Modules and Adapter BoardsTable 3-11. Transition Module and Adapter Board Installation Overview parity disabled no parity Table 3-12. Peripheral Connection Proceduresbaud rate 9600 baud default baud rate of MVME187 ports at powerupFigure 3-3. Using MVME712A/AM and MVME712B MVME Figure 3-4. Typical Transition Module Peripheral Port Connectors712A To J10 onTable 3-13. Installation Completion Procedure Completing the InstallationStarting the System Table 3-14. System Startup OverviewInitializing the Real-Time Clock Powering Up the SystemExamining and/or Changing Environmental Parameters Board ModeProgramming the PCCchip2 and VMEchip2 Table 3-15. RTC Initialization ProcedureSET MMddyyhhmm+/-CALC 187-BugSET 0522961037 ReturnGlobal Bus Timeout Backplane Power ConnectionsSystem Considerations Memory Address RangesGCSR Location Monitor Register Multiple Module Cage ConﬁgurationEthernet LAN +12 Vdc Fuse Storage and the Real-Time Clock SCSI Bus Termination187-Bugps Return 3-30 Hardware Preparation and InstallationIntroduction to MVME187Bug Debugger General InformationOverview of M88000 Firmware This Chapter CoversDescription of 187Bug Command FacilitiesTrap #496 Routines Keyboard Control Debugger or Diagnostic Directories187Bug Implementation Comparison with M68000-Based FirmwareMemory Requirements Booting and Restarting 187BugAutoboot Sequence AutobootStarting Up 187Bug ROMboot Sequence ROMbootNetwork Boot Sequence Network BootRestarting the System During COLD reset ResetDuring WARM reset AbortBreak Abort SequenceSYSFAIL* Assertion/Negation Break SequenceMPU Clock Speed Calculation Disk Support Facilities Disk I/O SupportParameter Tables Supported ControllersDevice Probe Function Blocks Versus SectorsBO Bootstrap Operating System Disk I/O via 187Bug CommandsIOI Input/Output Inquiry IOP Physical I/O to DiskController Command Packets BH Bootstrap and HaltDisk I/O via 187Bug System Calls Default 187Bug Controller and Device Parameters source Disk I/O Error CodesIntel 82596 LAN Coprocessor Ethernet Driver Network I/O SupportUDP/IP Protocol Modules Network Boot Control Module BOOTP Protocol ModuleRARP/ARP Protocol Modules TFTP Protocol ModuleMultiprocessor Support Network I/O Error CodesMultiprocessor Control Register MPCR Method MPCR Status Codes MPCR Powerup SequenceMultiprocessor Address Register MPAR 3. As the initialization proceeds, the execution path comes to the prompt routine Global Control and Status Register GCSR Method Table 4-1. Diagnostic Monitor Commands/Preﬁxes Diagnostic FacilitiesTable 4-1. Diagnostic Monitor Commands/Preﬁxes Table 4-2. Diagnostic UtilitiesCommand CommandTable 4-3. Diagnostic Test Groups 187Bug Diagnostic Test Groups4-28 Debugger General InformationEntering Debugger Command Lines Using the 187Bug DebuggerTerminal Input/Output Control This Chapter CoversUsing the 187Bug Debugger Debugger Command Syntax Expression as a Parameter Syntactic VariablesAddress as a Parameter Address Formats Offset Registers Port NumbersCreating a Program with the Assembler/Disassembler Entering and Debugging ProgramsDownloading an S-Record Object File Read the Program from Disk Calling System Utilities from User Programs187Bug Vector Table and Workspace Preserving the Debugger Operating EnvironmentHardware Functions Floating Point SupportException Vectors Used by 187Bug CPU/MPU Registers1. The sign field is the first field and is a binary field Double Precision Real Single Precision Real2 hex digits. Bias = $7F 3 hex digits. Bias = $3FFScientiﬁc Notation Table 5-1. Debugger Commands The 187Bug Debugger Command SetAS addr BC range del addr B H WHE command Table 5-1. Debugger Commands ContinuedDMA range del addr del vdir del am del blk DS addr count del addrMAW controller LUN Table 5-1. Debugger Commands Continueddel device LUN del block # MAR controller LUN del device LUNSYMS symbol-name S Table 5-1. Debugger Commands ContinuedRS reg del exp del addr S D SET mmddyyhhmm n CThis Appendix Covers AConﬁgure and Environment CommandsConﬁguring the Board Information Block Page ENV D Setting Environment to Bug/Operating SystemThe parameters to be configured are listed in the following table Table A-1. ENV Command ParametersFFBFFFFC Table A-1. ENV Command Parameters ContinuedTable A-1. ENV Command Parameters Continued Table A-1. ENV Command Parameters Continued FFFFCE0F Table A-1. ENV Command Parameters Continued01FFFFFF Table A-1. ENV Command Parameters ContinuedGuide Table A-1. ENV Command Parameters Continued01FF FFE1FFFFEFFFFFFF Table A-1. ENV Command Parameters ContinuedTable A-1. ENV Command Parameters Continued Table A-1. ENV Command Parameters Continued A-14 Configure and Environment CommandsDisk/Tape Controller Modules Supported BDisk/Tape Controller Data$XXXXXXXX Disk/Tape Controller Default ConﬁgurationsMVME328 -- 14 Devices MVME327A -- 9 DevicesMVME350 -- 1 Device IOT Command Parameters for Supported Floppy TypesIOT Parameter Other CharacteristicsFloppy Types and Formats DSDD5Disk/Tape Controller Data CNetwork Controller Data Table C-1. Network Controller Access DataNetwork Controller Modules Supported Table C-1. Network Controller Access Data Continued Table D-1. Troubleshooting Steps DTroubleshooting the MVME187 Solving Startup ProblemsTable D-1. Troubleshooting Steps Continued III. Debug Table D-1. Troubleshooting Steps Continued3. When prompted to Update Non-Volatile RAM, type in Table D-1. Troubleshooting Steps Continued187-Diag BREAKTable D-1. Troubleshooting Steps Continued Troubleshooting the MVME187 Solving Startup Problems Introduction EEIA-232-D InterconnectionsGrounding Table E-1. EIA-232-D InterconnectionsTable E-1. EIA-232-D Interconnections Continued Levels of ImplementationSample Conﬁgurations Signal AdaptationsFigure E-1. Middle-of-the-Road EIA-232-D Conﬁguration Figure E-2. Minimum EIA-232-D Connection Proper Grounding EIA-232-D Interconnections Index SymbolsNumerics I N D E support via 187Bug commands 4-15 via 187Bug system calls error codesdefault configurations B-2 I N D EI N D E I N D E local bus local I/O devices 2-26 VMEbus 2-28 VMEbus short I/OI N D E see also CD2401 scientific notation 5-14 SCON LED I N D Eedge significant 1-2 level significant in NVRAMI N D E see also CD2401 serial port 1 5-8 serial port 2I N D E