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Board Level Hardware Description

Memory Maps

There are two points of view for memory maps:

1.Local bus memory map

Ðthe mapping of all resources as viewed by local bus masters

2.VMEbus memory map

Ðthe mapping of onboard resources as viewed by VMEbus Masters

Local Bus Memory Map

The local bus memory map is split into different address spaces by the transfer type (TT) signals. The local resources respond to the normal access and interrupt acknowledge codes.

Normal Address Range Devices

The memory map of devices that respond to the normal address range is shown in the following tables. The normal address range is defined by the Transfer Type (TT) signals on the local bus.

On the MVME187, Transfer Types 0 and 1 define the normal address range.

Table 2-5 on page 2-25is the entire map from $00000000 to

$FFFFFFFF. Many areas of the map are user-programmable, and suggested uses are shown in the table.

The cache inhibit function is programmable in the MMUs.

The onboard I/O space must be marked cache inhibit and serialized in its page table.

Table 2-6 on page 2-26further defines the map for the local I/O devices.

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Image 48
Motorola MVME187 manual Memory Maps, Local Bus Memory Map, Normal Address Range Devices