Motorola MVME187 manual Functional Description, MEMC040 Memory Controller ASIC

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Board Level Hardware Description

MEMC040 Memory Controller ASIC

The MEMC040 memory controller ASIC provides the programmable interface for the parity-protected DRAM mezzanine board.

MCECC Memory Controller ASIC

The MCECC memory controller ASIC provides the programmable interface for the ECC-protected DRAM mezzanine board.

Functional Description

The major functional blocks of the MVME187 covered in this section are:

❏Front panel switches and LED indicators

❏Data bus structure

❏M88000 MPU

❏EPROM

❏SRAM

❏Onboard DRAM

❏Battery backed up RAM and clock

❏VMEbus interface

❏I/O interfaces

❏Local resources

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