Blocks Versus Sectors, Device Probe Function | Motorola MVME187

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Debugger General Information

Blocks Versus Sectors

The logical block defines the unit of information for disk devices. A disk is viewed by 187Bug as a storage area divided into logical blocks. By default, the logical block size is set to 256 bytes for every block device in the system. The block size can be changed on a per device basis with the IOT command.

The sector defines the unit of information for the media itself, as viewed by the controller. The sector size varies for different controllers, and the value for a specific device can be displayed and changed with the IOT command.

When a disk transfer is requested, the start and size of the transfer is specified in blocks. 187Bug translates this into an equivalent sector specification, which is then passed on to the controller to initiate the transfer. If the conversion from blocks to sectors yields a fractional sector count, an error is returned and no data is transferred.

Device Probe Function

A device probe with entry into the device descriptor table is done whenever a specified device is accessed; i.e., when system calls

.DSKRD, .DSKWR, .DSKCFIG, .DSKFMT, and .DSKCTRL, and debugger commands BH, BO, IOC, IOP, IOT, MAR, and MAW are used.

The device probe mechanism utilizes the SCSI commands "Inquiry" and "Mode Sense". If the specified controller is non-SCSI, the probe simply returns a status of "device present and unknown". The device probe makes an entry into the device descriptor table with the pertinent data. After an entry has been made, the next time a probe is done it simply returns with "device present" status (pointer to the device descriptor).

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Motorola MVME187 manual Blocks Versus Sectors, Device Probe Function

Contents

Risc Single Board Computer Installation Guide MVME187 Restricted Rights Legend Assembly Item Board Description Preface Safety Summary Safety Depends On You Copyright Motorola All Rights Reserved March Page Contents Page Page Page Page Page List of Figures List of Tables This Chapter Covers About this Manual Signal Name Conventions Data and Address Parameter Numeric Formats Assertion and Negation Conventions Data and Address Size DeﬁnitionsBig-Endian Byte Ordering Control and Status Bit Deﬁnitions True/False Bit State DeﬁnitionsBit Value Descriptions Related Documentation Document Set for MVME187-0xxBoardMotorola Description Publication Number Additional Manuals for this Board Other Applicable Motorola PublicationsSingle Board Computers Scsi Software UserÕs Manual Motorola Description Non-Motorola Peripheral Controllers Publications Bundle Part Number Description SBCCOMPS/L Applicable Non-Motorola Publications Document Title Source Introduction to the MVME187 Installation Guide Board Level Hardware Description General Description Onboard Memory Mezzanine Module Scsi Mass Storage Interface Serial Function Synchronous Signals Bit Rates Serial PortsParallel Printer Port Ethernet Transceiver Interface Features 187Bug Firmware Features Characteristics SpeciÞcations SpeciﬁcationsConformance to Requirements MVME187 General Speciﬁcations Connectors Board Level OverviewAdapters Transition Modules ASICs VMEchip2 Asic Bus TransfersPCCchip2 Asic Transfer type Can be Functional Description MEMC040 Memory Controller AsicMcecc Memory Controller Asic Front Panel Switches and LEDs Front Panel SwitchesSwitch Description Front Panel LEDs Data Bus Structure M88000 MPULocal Bus Arbitration Programmable Eprom Features Static RAM Optional Sram Battery Backup See Optional Sram Backup Power Source Select Header J6 on Onboard Dram Stacking Mezzanines Dram Programming Considerations Battery Backed Up RAM and Clock VMEbus Interface InterfacesSerial Port Interface Serial Interface Programming Considerations Status Pins Control PinsParallel Port Interface Ethernet Interface Buffer Overruns Scsi Interface Programmable Tick Timers Watchdog TimerLocal Bus Timeout Local Resources Memory Maps Local Bus Memory MapNormal Address Range Devices Address Software Devices Accessed Port Size Local Bus Memory MapRange Inhibit Address Range Devices Accessed Port Size Local I/O Devices Memory Map $FFFE000B Iack Level VMEbus Accesses to the Local Bus VMEbus Memory MapVMEbus Short I/O Memory Map Hardware Preparation and Installation Unpacking the Equipment Overview of Startup Procedure Install your MVME187 in the chassisStartup Overview Stage What you will need to do Refer to Prepare the MVME187 Complete the installation Stage What you will need to do Refer toConnect peripherals Package for Motorola 88K Modifying Conﬁguration before Installation Preparing the HardwareOption Modiﬁcation MVME187 Switches, Headers, Connectors, Fuses, and LEDs Jumper Settings Checking the 187Bug EPROMsEprom Location Eprom Orientation Optional Jumper Settings General Purpose Software Readable Header J1 Factory Settings for J1 General Purpose Readable Jumpers Bit J1 Pins DescriptionJ1 Bit Descriptions Header ConÞguration Jumpers Number Description Settings for J2 System Controller Header System Controller Header J2 Optional Sram Backup Power Source Select Header J6 Serial Port 4 Clock Conﬁguration Select Headers J7 and J8 Primary source VMEbus Number Description Preparing the MVME187 for Installation MVME187 Preparation ProcedureAction Chassis Preparation/Slot Selection Procedure Preparing the System ChassisStep Action Installing the Hardware Installing the MVME187 in the ChassisMVME187 Installation Procedure Transition Modules and Adapter Boards Overview Typical Internal Scsi and Serial Port Connections Equipment Connections 10. Peripheral ConnectionsEquipment Type Connect Through Installing Transition Modules and Adapter Boards Connecting Peripherals 12. Peripheral Connection Procedures Action Refer to Using MVME712A/AM and MVME712B Typical Transition Module Peripheral Port Connectors Completing the Installation 13. Installation Completion ProcedureStarting the System 14. System Startup Overview Powering Up the System If 187Bug is Board ModeSystem Mode Initializing the Real-Time Clock 15. RTC Initialization Procedure Step Action Board Mode System ModeProgramming the PCCchip2 and VMEchip2 Backplane Power Connections Global Bus TimeoutSystem Considerations Memory Address Ranges Multiple Module Cage Conﬁguration Gcsr Location Monitor RegisterEthernet LAN +12 Vdc Fuse Scsi Bus Termination Storage and the Real-Time Clock Hardware Preparation and Installation Introduction to MVME187Bug Overview of M88000 Firmware Command Facilities Description of 187BugTrap #496 Routines Debugger or Diagnostic Directories Keyboard Control Comparison with M68000-Based Firmware 187Bug Implementation Booting and Restarting 187Bug Memory Requirements Autoboot Autoboot SequenceStarting Up 187Bug ROMboot ROMboot Sequence Network Boot Network Boot SequenceRequirement Optionally, with the ENV command Restarting the System Reset Abort Abort Sequence Break SYSFAIL* Assertion/Negation MPU Clock Speed Calculation Disk I/O Support Disk Support FacilitiesParameter Tables Supported Controllers Blocks Versus Sectors Device Probe Function Disk I/O via 187Bug Commands BH Bootstrap and Halt Controller Command PacketsDisk I/O via 187Bug System Calls Default 187Bug Controller and Device Parameters Disk I/O Error Codes Using When you invoke one ChangeThese commands Status is Command BO or BH Network I/O Support Intel 82596 LAN Coprocessor Ethernet DriverUDP/IP Protocol Modules Bootp Protocol Module Network Boot Control ModuleRARP/ARP Protocol Modules Tftp Protocol Module Network I/O Error Codes Multiprocessor SupportMultiprocessor Control Register Mpcr Method Mpcr Powerup Sequence Mpcr Status CodesMultiprocessor Address Register Mpar Multiprocessor Support Global Control and Status Register Gcsr Method Diagnostic Facilities Diagnostic Monitor Commands/PreﬁxesCommand Description PreÞx Diagnostic Utilities Command Description Write loop enable Read loop enable 187Bug Diagnostic Test Groups Diagnostic Test Groups Debugger General Information Entering Debugger Command Lines Terminal Input/Output Control More characters to it. You can edit the line by Debugger Command Syntax Syntactic Variables Expression as a ParameterBase IdentiÞer Examples Address as a Parameter String Numeric Value LiteralExpression Result In Hex Address Formats Port Numbers Offset Registers Entering and Debugging Programs Creating a Program with the Assembler/DisassemblerDownloading an S-Record Object File Calling System Utilities from User Programs Read the Program from Disk Preserving the Debugger Operating Environment 187Bug Vector Table and Workspace Floating Point Support Hardware FunctionsException Vectors Used by 187Bug CPU/MPU Registers Integer Data Types Floating Point Data Types Single Precision Real Double Precision Real Scientiﬁc Notation 187Bug Debugger Command Set Debugger Commands Cnfg I M CS range B H WENV D IOI C L Niot HA Zn aNopa port Nopf port RL addr B H W SYM addrTime C L O VER E This Appendix Covers Conﬁguring the Board Information BlockCnfg IM Configure and Environment Commands Setting Environment to Bug/Operating System Table A-1. ENV Command Parameters ENV Parameter and Options Default Meaning of Default First location tested when the Bug LUN Network Auto Boot ConÞguration Memory Search Ending Address Slave address decoders setup Guide Base address of the VMEbus resource This will be the local bus address Table A-1. ENV Command Parameters Configure and Environment Commands Disk/Tape Controller Modules Supported Controller Type First SecondAddress Disk/Tape Controller Default Conﬁgurations $XXXXXXXX MVME327A -- 9 Devices Controller LUN Address Device LUN Device Type IOT Command Parameters for Supported Floppy Types IOT Parameter Floppy Types and Formats Other Characteristics Disk/Tape Controller Data Table C-1. Network Controller Access Data Debugger Commands Debugger System CallsNetwork Controller Modules Supported Address Interface $FFFFA400 Table D-1. Troubleshooting Steps Condition Possible Try This Problem Troubleshooting the MVME187 Solving Startup Problems Table D-1. Troubleshooting Steps Set mmddyyhhmm Return Envd ReturnReturn Env Return St ReturnDe Return Troubleshooting the MVME187 Solving Startup Problems EEIA-232-D Interconnections Introduction Signal Name and Description Table E-1. EIA-232-D InterconnectionsPin Number Mnemonic Signal Name and Description Number Mnemonic Levels of Implementation Signal Adaptations Sample Conﬁgurations Figure E-1. Middle-of-the-Road EIA-232-D Conﬁguration Figure E-2. Minimum EIA-232-D Connection Proper Grounding EIA-232-D Interconnections Index Bootp Default configurations B-2 IN-12 Local bus Local I/O devices 2-26VMEbus 2-28VMEbus short I/O IN-14 See also CD2401 scientific notation 5-14 Scon LED Nvram XON/XOFF