Primary source VMEbus | Motorola MVME187 guide

3

Hardware Preparation and Installation

Table 3-5. Settings for Optional J6 SRAM Backup Power Source

Select Header

Header

Header

ConÞguration

Jumpers

Number

Description

Primary source

VMEbus

J6

+5V STBY

1

2

Secondary source

3

4

VMEbus +5V STBY

5

6

(Factory

conÞguration)

Primary source

J6

optional battery

1

2

Secondary source

3

4

SRAM backup

optional battery

5

6

J6

power source

select header

Primary source

J6

VMEbus +5V STBY

1

2

Secondary source

3

4

optional battery

5

6

J6

Primary source

1

2

optional battery

Secondary source

3

4

VMEbus +5V STBY

5

6

3-12

Image 64

Motorola MVME187 manual Primary source VMEbus

Contents

Risc Single Board Computer Installation Guide MVME187 Restricted Rights Legend Assembly Item Board Description Preface Safety Summary Safety Depends On You Copyright Motorola All Rights Reserved March Page Contents Page Page Page Page Page List of Figures List of Tables This Chapter Covers About this Manual Signal Name Conventions Data and Address Parameter Numeric Formats Data and Address Size Deﬁnitions Assertion and Negation ConventionsBig-Endian Byte Ordering True/False Bit State Deﬁnitions Control and Status Bit DeﬁnitionsBit Value Descriptions Document Set for MVME187-0xxBoard Related DocumentationMotorola Description Publication Number Additional Manuals for this Board Other Applicable Motorola PublicationsSingle Board Computers Scsi Software UserÕs Manual Motorola Description Non-Motorola Peripheral Controllers Publications Bundle Part Number Description SBCCOMPS/L Applicable Non-Motorola Publications Document Title Source Introduction to the MVME187 Installation Guide Board Level Hardware Description General Description Onboard Memory Mezzanine Module Scsi Mass Storage Interface Serial Function Synchronous Signals Bit Rates Serial PortsParallel Printer Port Ethernet Transceiver Interface Features 187Bug Firmware Features Characteristics SpeciÞcations SpeciﬁcationsConformance to Requirements MVME187 General Speciﬁcations Board Level Overview ConnectorsAdapters Transition Modules ASICs VMEchip2 Asic Bus TransfersPCCchip2 Asic Transfer type Can be MEMC040 Memory Controller Asic Functional DescriptionMcecc Memory Controller Asic Front Panel Switches and LEDs Front Panel SwitchesSwitch Description Front Panel LEDs M88000 MPU Data Bus StructureLocal Bus Arbitration Programmable Eprom Features Static RAM Optional Sram Battery Backup See Optional Sram Backup Power Source Select Header J6 on Onboard Dram Stacking Mezzanines Dram Programming Considerations Battery Backed Up RAM and Clock Interfaces VMEbus InterfaceSerial Port Interface Serial Interface Programming Considerations Control Pins Status PinsParallel Port Interface Ethernet Interface Buffer Overruns Scsi Interface Programmable Tick Timers Watchdog TimerLocal Bus Timeout Local Resources Local Bus Memory Map Memory MapsNormal Address Range Devices Address Software Devices Accessed Port Size Local Bus Memory MapRange Inhibit Address Range Devices Accessed Port Size Local I/O Devices Memory Map $FFFE000B Iack Level VMEbus Memory Map VMEbus Accesses to the Local BusVMEbus Short I/O Memory Map Hardware Preparation and Installation Unpacking the Equipment Overview of Startup Procedure Install your MVME187 in the chassisStartup Overview Stage What you will need to do Refer to Prepare the MVME187 Stage What you will need to do Refer to Complete the installationConnect peripherals Package for Motorola 88K Preparing the Hardware Modifying Conﬁguration before InstallationOption Modiﬁcation MVME187 Switches, Headers, Connectors, Fuses, and LEDs Jumper Settings Checking the 187Bug EPROMsEprom Location Eprom Orientation Optional Jumper Settings General Purpose Software Readable Header J1 Factory Settings for J1 General Purpose Readable Jumpers Bit J1 Pins DescriptionJ1 Bit Descriptions Header ConÞguration Jumpers Number Description Settings for J2 System Controller Header System Controller Header J2 Optional Sram Backup Power Source Select Header J6 Serial Port 4 Clock Conﬁguration Select Headers J7 and J8 Primary source VMEbus Number Description MVME187 Preparation Procedure Preparing the MVME187 for InstallationAction Preparing the System Chassis Chassis Preparation/Slot Selection ProcedureStep Action Installing the MVME187 in the Chassis Installing the HardwareMVME187 Installation Procedure Transition Modules and Adapter Boards Overview Typical Internal Scsi and Serial Port Connections 10. Peripheral Connections Equipment ConnectionsEquipment Type Connect Through Installing Transition Modules and Adapter Boards Connecting Peripherals 12. Peripheral Connection Procedures Action Refer to Using MVME712A/AM and MVME712B Typical Transition Module Peripheral Port Connectors Completing the Installation 13. Installation Completion ProcedureStarting the System 14. System Startup Overview Powering Up the System If 187Bug is Board ModeSystem Mode Initializing the Real-Time Clock Step Action Board Mode System Mode 15. RTC Initialization ProcedureProgramming the PCCchip2 and VMEchip2 Backplane Power Connections Global Bus TimeoutSystem Considerations Memory Address Ranges Gcsr Location Monitor Register Multiple Module Cage ConﬁgurationEthernet LAN +12 Vdc Fuse Scsi Bus Termination Storage and the Real-Time Clock Hardware Preparation and Installation Introduction to MVME187Bug Overview of M88000 Firmware Description of 187Bug Command FacilitiesTrap #496 Routines Debugger or Diagnostic Directories Keyboard Control Comparison with M68000-Based Firmware 187Bug Implementation Booting and Restarting 187Bug Memory Requirements Autoboot Sequence AutobootStarting Up 187Bug ROMboot ROMboot Sequence Network Boot Sequence Network BootRequirement Optionally, with the ENV command Restarting the System Reset Abort Abort Sequence Break SYSFAIL* Assertion/Negation MPU Clock Speed Calculation Disk I/O Support Disk Support FacilitiesParameter Tables Supported Controllers Blocks Versus Sectors Device Probe Function Disk I/O via 187Bug Commands Controller Command Packets BH Bootstrap and HaltDisk I/O via 187Bug System Calls Default 187Bug Controller and Device Parameters Disk I/O Error Codes Using When you invoke one ChangeThese commands Status is Command BO or BH Intel 82596 LAN Coprocessor Ethernet Driver Network I/O SupportUDP/IP Protocol Modules Bootp Protocol Module Network Boot Control ModuleRARP/ARP Protocol Modules Tftp Protocol Module Multiprocessor Support Network I/O Error CodesMultiprocessor Control Register Mpcr Method Mpcr Status Codes Mpcr Powerup SequenceMultiprocessor Address Register Mpar Multiprocessor Support Global Control and Status Register Gcsr Method Diagnostic Monitor Commands/Preﬁxes Diagnostic FacilitiesCommand Description PreÞx Diagnostic Utilities Command Description Write loop enable Read loop enable 187Bug Diagnostic Test Groups Diagnostic Test Groups Debugger General Information Entering Debugger Command Lines Terminal Input/Output Control More characters to it. You can edit the line by Debugger Command Syntax Expression as a Parameter Syntactic VariablesBase IdentiÞer Examples String Numeric Value Literal Address as a ParameterExpression Result In Hex Address Formats Port Numbers Offset Registers Creating a Program with the Assembler/Disassembler Entering and Debugging ProgramsDownloading an S-Record Object File Calling System Utilities from User Programs Read the Program from Disk Preserving the Debugger Operating Environment 187Bug Vector Table and Workspace Floating Point Support Hardware FunctionsException Vectors Used by 187Bug CPU/MPU Registers Integer Data Types Floating Point Data Types Single Precision Real Double Precision Real Scientiﬁc Notation 187Bug Debugger Command Set Debugger Commands Cnfg I M CS range B H WENV D IOI C L Niot HA Zn aNopa port Nopf port RL addr B H W SYM addrTime C L O VER E Conﬁguring the Board Information Block This Appendix CoversCnfg IM Configure and Environment Commands Setting Environment to Bug/Operating System Table A-1. ENV Command Parameters ENV Parameter and Options Default Meaning of Default First location tested when the Bug LUN Network Auto Boot ConÞguration Memory Search Ending Address Slave address decoders setup Guide Base address of the VMEbus resource This will be the local bus address Table A-1. ENV Command Parameters Configure and Environment Commands Controller Type First Second Disk/Tape Controller Modules SupportedAddress Disk/Tape Controller Default Conﬁgurations $XXXXXXXX MVME327A -- 9 Devices Controller LUN Address Device LUN Device Type IOT Command Parameters for Supported Floppy Types IOT Parameter Floppy Types and Formats Other Characteristics Disk/Tape Controller Data Table C-1. Network Controller Access Data Debugger Commands Debugger System CallsNetwork Controller Modules Supported Address Interface $FFFFA400 Table D-1. Troubleshooting Steps Condition Possible Try This Problem Troubleshooting the MVME187 Solving Startup Problems Table D-1. Troubleshooting Steps Envd Return Set mmddyyhhmm ReturnReturn St Return Env ReturnDe Return Troubleshooting the MVME187 Solving Startup Problems EEIA-232-D Interconnections Introduction Signal Name and Description Table E-1. EIA-232-D InterconnectionsPin Number Mnemonic Signal Name and Description Number Mnemonic Levels of Implementation Signal Adaptations Sample Conﬁgurations Figure E-1. Middle-of-the-Road EIA-232-D Conﬁguration Figure E-2. Minimum EIA-232-D Connection Proper Grounding EIA-232-D Interconnections Index Bootp Default configurations B-2 IN-12 Local bus Local I/O devices 2-26VMEbus 2-28VMEbus short I/O IN-14 See also CD2401 scientific notation 5-14 Scon LED Nvram XON/XOFF