Ladder Logic Elements and Instructions

DX Loadable Support

Introduction

The M1 CPUs can use DX loadable instructions, which support optional software

 

products that can be purchased for special applications. DX loadables provide the

 

user with special ladder logic functions.

Loaded on

 

The code for DX loadables gets loaded into the Page 0 area. Thus, for every word

Page 0

of DX loadable that is loaded, one word of Page 0 becomes unavailable for other

 

use (such as application logic).

Limited

 

DX loadables are limited in the functionality they can provide because they do not

Functionality

provide storage for variables and are limited in their size.

M1 Support

 

M1 supports only loadables targeted for 80x86 microprocessors running in 16-bit

 

real mode that have not made any hard-coded hardware assumptions (e.g., the

 

address and format of the TOD clock). Obviously, there must be enough available

 

memory to fit the loadable.

Saved to Flash

 

Since DX loadables are stored in Page 0 memory, they are saved whenever a

 

save-to-Flash operation is initiated.

 

 

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Schneider Electric Processor Adapter manual DX Loadable Support