115
FIGURE 23 - PCMCIA CONSECUTIVE READ CYCLES
ns
ns
ns
ns
ns
ns
ns
ns
ns
35
40
0
5
5
185
0
15
25
15
0
Parameter
t46
t47
t48
t20
t49
t50
t51
t52
t53
nIORD Delay to
nREG Low to Control
nCE1,nCE2 Setup to Control
Cycle Time (No Wait
nREG Hold after Control
nCE1,nCE2 Hold after Control
Address Setup to Control
Address Hold after Control
nIORD Active to Data
min
typ
max
units
t51
t52
t48
t20
t49
t50
t53
t47
t46
t46
valid
valid
A0-9,A15
nREG
nCE1,nCE
nIORD
D0-15
nINPAC