Only when 16 retries are reached, the CSMA/CD block will clear the TXENA bit, and CPU intervention is required. The DMA will not automatically restart data transfer in this case, nor will it transmit the next enqueued packet until TXENA is set by the CPU. The DMA will move the packet number in question from the TX FIFO into the TX completion FIFO.
NETWORK INTERFACE
The SMC91C95 includes both an AUI interface for thick and thin coax applications and a
1.Manchester encoder/decoder to convert NRZ data to Manchester encoded data and back.
2.A 32 ms jabber timer to prevent inadvertently long transmissions. When 'jabbing' occurs, the transmitter is disabled, automatic loopback is disabled (in
3.A
4.Diagnostic loopback capability.
5.LED drivers for collision, transmission, reception, and jabber.
10BASE-T
transmission, data is automatically looped back to the receiver except during collision periods, in which case the input to the receiver is network data. During collisions, should the receive input go idle prior to the transmitter going idle, input to the receiver switches back to the transmitter within 9 bit times. Following transmission, the transmitter performs a SQE test. This test exercises the collision detection circuitry within the
In full duplex mode, carrier sense is asserted during receive activity only. The receiver monitors the media at all times. It recovers the clock and data and passes it along to the controller. In the absence of any receive activity, the transmitter is looped back to the receiver. In addition, the receiver performs automatic polarity correction. The
1.Link_loss_timer: 64 ms
2.Link_test_min_timer: 4 ms
3.Link_count: 2
4.Link_test_max_timer: 64 ms
The state of the link is reflected in the EPHSR.
AUI
The SMC91C95 also provides a standard 6 wire AUI interface to a coax transceiver.
PHYSICAL INTERFACE
The
of received signals and transmitted | data on | |
the | media. | During |
97
The internal physical interface (PHY) consists of an encoder/decoder (ENDEC) and an internal
