SMC Networks SMC91C95 manual

receive are fully independent. It has 6 kbytes of internal memory and the MMU manages memory in 256 byte pages. The memory size accommodates the increase in interrupt latency resulting from simultaneous LAN and modem operation as well as the potential for simultaneous transmit and receive traffice in some full duplex applications.

Packet reception and transmission are determined by memory availability. All other resources are always available if memory is

available. To complement this flexible architecture, all ISA bus interface functions are incorporated in the SMC91C95, as well as a 4608 byte packet RAM and serial EEPROM- based setup. The user can select or modify configuration choices.

The SMC91C95 stores the Configuration Information Structure (CIS) on reset or power- up from the serial EEPROM. This allows the host to access data to allow the setup of the PCMCIA multi-function card.

In ISA mode, the serial EEPROM acts as storage for configuration and IEEE Ethernet address information compatible with the existing SMC9000 family of ISA Ethernet controllers.

In PCMCIA mode, the serial EEPROM stores the CIS, as well as the IEEE address, information, but it does not store any I/O or IRQ information since this information is handled by

the host’s socket controller. For CIS requirements above 512 bytes, an optional external parallel EEPROM can be used in conjunction with the internal CIS. This allows additional external, non-volatile storage for applications that require XIP and use the modem function. If the serial EEPROM is not used in PCMCIA mode, the parallel EEPROM must be used. In this case, the parallel EEPROM is selected for the first 512 bytes of storage as well, allowing the CIS to be stored in the parallel EEPROM and, on power-up, to be

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read directly by the host. The remaining parallel EEPROM can be used for XIP applications, if needed.

The SMC91C95 integrates most of the 802.3 functionality, incorporating the MAC layer protocol, the physical layer encoding and decoding functions with the ability to handle the AUI interface. For twisted pair networks, the SMC91C95 integrates the twisted pair transceiver as well as the link integrity test functions.

The SMC91C95 is a true 10BASE-T single chip able to interface a system or a local bus.

Directly-driven LEDs for installation and run- time diagnostics are provided, as well as 802.3 statistics gathering to facilitate network management.

The SMC91C95 offers:

High integration:

Single chip adapter including: Packet RAM

ISA bus interface PCMCIA interface EEPROM interface

Encoder decoder with AUI interface Full duplex, magic packet 10BASE-T transceiver

Lucent Technologies and Rockwell International modem interface

High performance:

Chained (“back-to-back”) packet handling with no CPU intervention:

Queues transmit packets Queues receive packets

Full duplex operation for higher network throughput

Stores results in memory along with packet

Queues Ethernet and modem interrupts

Optional single interrupt upon completion of transmit chain