8022h - Modem Configuration and Status Register (MCSR) Address 8022h
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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Changed | SigChg | IOIs8 | Reserved | Audio | Pwrdwn | Intr | IntrACK |
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0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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Bit 7 - Changed: This bit is the logical OR of the
Bit 6 - SigChg: If this bit is a one, the function is enabled (configured), the Changed bit controls the nSTSCHG pin. If this bit is low or the function is disabled, the nSTSCHG pin is set to a high.
Bit 5 - IOIs8: This bit when set, indicates that the Host can only do 8 bit cycles (on
Bit 4 - ResurvedBit 3 - Audio: This bit controls the audio pass through of the digital audio. When cleared, the SPKROUT pin is
Bit 2 - PwrDwn: When set (1), this bit puts the modem into powerdown mode. The modem is also put into powerdown mode when the Enable Function bit is cleared. When in powerdown, the MRINGIN signal is blocked from going to the ringing output signal. When taken out of powerdown (when PwrDwn is cleared (1) and Enable Function in the MCOR (bit 0) is set (1)),
the modem is awakened by a
pulse on the output ringing signals as appropriate. The pulse duration is determined by the input signal MRINGIN. MRINGIN is then passed to the outputs.
Bit 1 - Intr: This bit is read/set to a one when this function is requesting interrupt service. It is cleared depending upon the setting of IntrACK. When this bit and Enable IREQ Routing are set,
The Intr bit can be reset the following ways and priority ranging from 1=highest to 3=lowest:
1)A hardware reset/power up
2)The function ie. interrupt source can only reset this field to zero (0) if the IntrACK
field is | reset to zero (0). |
3)The host system can only reset this field to a zero (0) only if the IntrACK bit is set to a one (1).
Bit 0 - IntrACK: This bit controls the clearing of the Intr bit. When this bit is cleared, Intr reflects the function's interrupt status. When this bit is set, the Intr bit must be cleared by the host writing a 0 into it. If the function requires additional service (indicated by leaving MINT active) the Intr bit will remain asserted when the host writes the 0.
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