FUNCTIONAL DESCRIPTION

The SMC91C95 consists of an integrated Ethernet controller mapped entirely in I/O space, as well as support for an external Modem controller also mapped in I/O space. In addition, PCMCIA attribute memory space is decoded to interface an external CIS ROM, with configuration registers as per PCMCIA 3.X extensions implemented on-chip in attribute space above the CIS ROM decode area. The PCMCIA Configuration Registers are accessible also in I/O space to allow non-PCMCIA dual function designs.

The Ethernet controller function includes a built-in 6kbyte RAM for packet storage. This RAM buffer is accessed by the CPU through two sequential access regions of 3 kbytes each. The RAM access is internally arbitrated by the SMC91C95 and dynamically allocated between transmit and receive packets using 256 byte pages. The Ethernet controller functionality is identical to the SMC91C94 except where indicated otherwise.

Table 1 - Bus Transactions in ISA Mode

 

A0

nSBHE

D0-D7

D8-D15

 

 

 

 

 

8 BIT MODE

0

X

even byte

-

(nEN16=1)

 

 

 

 

 

 

 

 

 

(16 BIT=0)

1

X

odd byte

-

 

 

 

 

 

16 BIT MODE

0

0

even byte

odd byte

 

 

 

 

 

otherwise

0

1

even byte

-

 

 

 

 

 

 

1

0

-

odd byte

 

 

 

 

 

 

1

1

invalid cycle

 

 

 

 

 

21

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SMC Networks SMC91C95 manual Functional Description, Bus Transactions in ISA Mode NSBHE D0-D7 D8-D15, BIT Mode