95
FIGURE 16 - MMU PACKET NUMBER FLOW AND RELEVANT REGISTERS
TX
FIFO
COMPLETION
FIFO
RX
FIFO

CSMA/CD

LOGICAL
ADDRESS
PACKET #

MMU

PHYSICAL ADDRESS

RAM

CPU ADDRESS CSMA ADDRESS
RX PACKET
NUMBER
RX FIFO
PACKET NUMBER
PACKET NUMBER
REGISTER
PACK # OUT
TX DONE
PACKET NUMBER
ALLOCATION
RESULT REGISTER
ALLOCATE
RELEASE
PACK # OUT

DMA

RDWR
TX
DECODER
MMU
COMMAND
REGISTER
ALLOCATE
RELEASE