Texas Instruments MSP430x1xx manual BR, Branch

Instruction Set

* BR, BRANCH	Branch to .......... destination
Syntax	BR	dst
Operation	dst −> PC
Emulation	MOV	dst,PC
Description	An unconditional branch is taken to an address anywhere in the 64K address
	space. All source addressing modes can be used. The branch instruction is
	a word instruction.
Status Bits	Status bits are not affected.
Example	Examples for all addressing modes are given.
	BR	#EXEC	;Branch to label EXEC or direct branch (e.g. #0A4h)
			; Core instruction MOV @PC+,PC
	BR	EXEC	; Branch to the address contained in EXEC
			; Core instruction MOV X(PC),PC
			; Indirect address
	BR	&EXEC	; Branch to the address contained in absolute
			; address EXEC
			; Core instruction MOV X(0),PC
			; Indirect address
	BR	R5	; Branch to the address contained in R5
			; Core instruction MOV R5,PC
			; Indirect R5
	BR	@R5	; Branch to the address contained in the word
			; pointed to by R5.
			; Core instruction MOV @R5,PC
			; Indirect, indirect R5
	BR	@R5+	; Branch to the address contained in the word pointed
			; to by R5 and increment pointer in R5 afterwards.
			; The next time—S/W flow uses R5 pointer—it can
			; alter program execution due to access to
			; next address in a table pointed to by R5
			; Core instruction MOV @R5,PC
			; Indirect, indirect R5 with autoincrement
	BR	X(R5)	; Branch to the address contained in the address
			; pointed to by R5 + X (e.g. table with address

; starting at X). X can be an address or a label ; Core instruction MOV X(R5),PC

; Indirect, indirect R5 + X

3-28 RISC 16−Bit CPU