Texas Instruments MSP430x1xx manual Changing the Value of Period Register TBCL0

Timer_B Operation

Changing the Value of Period Register TBCL0

When changing TBCL0 while the timer is running, and counting in the down direction, and when the TBCL0 load mode is immediate, the timer continues its descent until it reaches zero. The new period takes effect after the counter counts down to zero.

If the timer is counting in the up direction when the new period is latched into TBCL0, and the new period is greater than or equal to the old period, or greater than the current count value, the timer counts up to the new period before counting down. When the timer is counting in the up direction, and the new period is less than the current count value when TBCL0 is loaded, the timer begins counting down. However, one additional count may occur before the counter begins counting down.

Use of the Up/Down Mode

The up/down mode supports applications that require dead times between output signals (see section Timer_B Output Unit). For example, to avoid overload conditions, two outputs driving an H-bridge must never be in a high state simultaneously. In the example shown in Figure 12−9 the t dead is:

tdead = ttimer ⋅ (TBCL1 − TBCL3)

With: tdead	Time during which both outputs need to be inactive
ttimer	Cycle time of the timer clock
TBCLx	Content of compare latch x

The ability to simultaneously load grouped compare latches assures the dead times.

Figure 12−9. Output Unit in Up/Down Mode

TBR(max)
TBCL0
TBCL1
TBCL3
0h							Dead Time
							Output Mode 6: Toggle/Set
							Output Mode 2: Toggle/Reset
TBIFG	EQU1	EQU1	TBIFG		EQU1	EQU1	Interrupt Events
	EQU0				EQU0
EQU3		EQU3		EQU3		EQU3

12-10Timer_B